[v2,00/12] Add PCIe AER disable and IRQ support for ipn3ke

  This patch set adds PCIe AER disable and IRQ support for ipn3ke.
Disable PCIe AER is very useful when FPGA reload. IRQ is used
very widely in interrupt process.

For ipn3ke is connect to CPU with PCIe switch, driver needs to
scan all PCIe devices of ipn3ke, it also can get all i40e of card,
so ipn3ke driver doesn't need to take some configuration of i40e.

v2 updates:
===========
 - Add AUX feature support

Rosen Xu (3):
  net/i40e: i40e support ipn3ke FPGA port bonding
  raw/ifpga_rawdev: add PCIe BDF devices tree scan
  net/ipn3ke: remove configuration for i40e port bonding

Tianfei Zhang (2):
  raw/ifpga_rawdev/base: align the send buffer for SPI
  raw/ifpga_rawdev/base: introducing sensor APIs

Tianfei zhang (7):
  raw/ifpga_rawdev/base: add irq support
  raw/ifpga_rawdev/base: clear pending bit
  raw/ifpga_rawdev/base: add SEU error support
  raw/ifpga_rawdev/base: add device tree support
  raw/ifpga_rawdev/base: add sensor support
  raw/ifpga_rawdev/base: update SEU register definition
  raw/ifpga_rawdev: add SEU error handler

 drivers/net/i40e/base/i40e_type.h                  |   3 +
 drivers/net/i40e/i40e_ethdev.c                     |  34 +-
 drivers/net/i40e/rte_pmd_i40e.h                    |   4 +
 drivers/net/ipn3ke/Makefile                        |   2 +
 drivers/net/ipn3ke/ipn3ke_ethdev.c                 | 289 +-------
 drivers/net/ipn3ke/ipn3ke_representor.c            |   7 +-
 drivers/raw/ifpga_rawdev/base/ifpga_api.c          |  10 +
 drivers/raw/ifpga_rawdev/base/ifpga_defines.h      |  18 +-
 drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c  |  61 ++
 drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.h  |   3 +
 drivers/raw/ifpga_rawdev/base/ifpga_fme.c          |  21 +
 drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c    |  69 +-
 drivers/raw/ifpga_rawdev/base/ifpga_port.c         |  20 +
 drivers/raw/ifpga_rawdev/base/ifpga_port_error.c   |  21 +
 drivers/raw/ifpga_rawdev/base/opae_hw_api.c        | 115 +++
 drivers/raw/ifpga_rawdev/base/opae_hw_api.h        |  16 +
 drivers/raw/ifpga_rawdev/base/opae_ifpga_hw_api.h  |   2 +
 drivers/raw/ifpga_rawdev/base/opae_intel_max10.c   | 462 ++++++++++++
 drivers/raw/ifpga_rawdev/base/opae_intel_max10.h   |  66 ++
 drivers/raw/ifpga_rawdev/base/opae_osdep.h         |   7 +-
 .../raw/ifpga_rawdev/base/opae_spi_transaction.c   |  40 +-
 drivers/raw/ifpga_rawdev/ifpga_rawdev.c            | 795 ++++++++++++++++++++-
 drivers/raw/ifpga_rawdev/ifpga_rawdev.h            |  16 +
 mk/rte.app.mk                                      |   2 +-
 24 files changed, 1805 insertions(+), 278 deletions(-)
  

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Rosen Xu
> Sent: Friday, August 2, 2019 6:49 AM
> To: dev@dpdk.org
> Cc: ferruh.yigit@intel.com; tianfei.zhang@intel.com; rosen.xu@intel.com;
> andy.pei@intel.com; david.lomartire@intel.com; qi.z.zhang@intel.com;
> xiaolong.ye@intel.com
> Subject: [dpdk-dev] [PATCH v2 00/12] Add PCIe AER disable and IRQ support
> for ipn3ke
> 
> This patch set adds PCIe AER disable and IRQ support for ipn3ke.
> Disable PCIe AER is very useful when FPGA reload. IRQ is used very widely in
> interrupt process.

Shouldn't it better to have common code in PCI subsystem to disable PCIe AER etc,
So that other drivers can be used in future.

> 
> For ipn3ke is connect to CPU with PCIe switch, driver needs to scan all PCIe

Do we need a special PCIe switch for this? Or Generic PCIe switch would do?

> devices of ipn3ke, it also can get all i40e of card, so ipn3ke driver doesn't
> need to take some configuration of i40e.

Is communication between i40e and ipn3ke proprietary scheme?
Who is the PCIe bus master here? Ipn3ke or i40e?
  

Hi,

> -----Original Message-----
> From: Jerin Jacob Kollanukkaran [mailto:jerinj@marvell.com]
> Sent: Friday, August 02, 2019 12:15
> To: Xu, Rosen <rosen.xu@intel.com>; dev@dpdk.org
> Cc: Yigit, Ferruh <ferruh.yigit@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Pei, Andy <andy.pei@intel.com>; Lomartire,
> David <david.lomartire@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Ye,
> Xiaolong <xiaolong.ye@intel.com>
> Subject: RE: [dpdk-dev] [PATCH v2 00/12] Add PCIe AER disable and IRQ
> support for ipn3ke
> 
> > -----Original Message-----
> > From: dev <dev-bounces@dpdk.org> On Behalf Of Rosen Xu
> > Sent: Friday, August 2, 2019 6:49 AM
> > To: dev@dpdk.org
> > Cc: ferruh.yigit@intel.com; tianfei.zhang@intel.com;
> > rosen.xu@intel.com; andy.pei@intel.com; david.lomartire@intel.com;
> > qi.z.zhang@intel.com; xiaolong.ye@intel.com
> > Subject: [dpdk-dev] [PATCH v2 00/12] Add PCIe AER disable and IRQ
> > support for ipn3ke
> >
> > This patch set adds PCIe AER disable and IRQ support for ipn3ke.
> > Disable PCIe AER is very useful when FPGA reload. IRQ is used very
> > widely in interrupt process.
> 
> Shouldn't it better to have common code in PCI subsystem to disable PCIe
> AER etc, So that other drivers can be used in future.

That's a good proposal. But there's something special in IPN3KE.
In IPN3KE, one Intel A10 FPGA and two I40e are connected to CPU with PCIe
switch chip, there are some errors when PCIe switch chip bonding to VFIO,
in our design, we access PCIe configure space with pread/pwrite.
For AER disable, we need access PCIe switch chip configuration space.

> >
> > For ipn3ke is connect to CPU with PCIe switch, driver needs to scan
> > all PCIe
> 
> Do we need a special PCIe switch for this? Or Generic PCIe switch would do?

It's hardware specific.
 
> > devices of ipn3ke, it also can get all i40e of card, so ipn3ke driver
> > doesn't need to take some configuration of i40e.
> 
> Is communication between i40e and ipn3ke proprietary scheme?

Yes.

> Who is the PCIe bus master here? Ipn3ke or i40e?

From DPDK point of view, there are 3 PCIe devices in DPDK  one Intel A10 FPGA and two I40e.
No master.

> 
>