From patchwork Thu Jul 24 06:42:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Helin" X-Patchwork-Id: 92 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 5AC0CB36A for ; Thu, 24 Jul 2014 08:41:30 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 23 Jul 2014 23:36:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,722,1400050800"; d="scan'208";a="566441341" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga001.fm.intel.com with ESMTP; 23 Jul 2014 23:42:46 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s6O6gjnq017108; Thu, 24 Jul 2014 14:42:45 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s6O6gf7A011675; Thu, 24 Jul 2014 14:42:43 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s6O6gfS4011671; Thu, 24 Jul 2014 14:42:41 +0800 From: Helin Zhang To: dev@dpdk.org Date: Thu, 24 Jul 2014 14:42:29 +0800 Message-Id: <1406184149-11531-6-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1406184149-11531-1-git-send-email-helin.zhang@intel.com> References: <1406184149-11531-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH 5/5] app/testpmd: new commands for configuring hash functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Jul 2014 06:41:31 -0000 Six commands are added in testpmd to support configuring hash functions. They are, * i40e_get_sym_hash_ena_per_port * i40e_set_sym_hash_ena_per_port * i40e_get_sym_hash_ena_per_pctype * i40e_set_sym_hash_ena_per_pctype * i40e_get_filter_swap * i40e_set_filter_swap Signed-off-by: Helin Zhang --- app/test-pmd/cmdline.c | 455 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 455 insertions(+) diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index 345be11..0e075da 100644 --- a/app/test-pmd/cmdline.c +++ b/app/test-pmd/cmdline.c @@ -74,6 +74,10 @@ #include #include #include +#include +#ifdef RTE_LIBRTE_I40E_PMD +#include +#endif #include #include @@ -655,6 +659,34 @@ static void cmd_help_long_parsed(void *parsed_result, "get_flex_filter (port_id) index (idx)\n" " get info of a flex filter.\n\n" + +#ifdef RTE_LIBRTE_I40E_PMD + "i40e_get_sym_hash_ena_per_port (port_id)\n" + " get symmetric hash enable configuration per port," + " on i40e only\n\n" + + "i40e_set_sym_hash_ena_per_port (port_id)" + " enable|disable\n" + " set symmetric hash enable configuration per port" + " to enable or disable, on i40e only\n\n" + + "i40e_get_sym_hash_ena_per_pctype (port_id) (pctype)\n" + " get symmetric hash enable configuration per port," + " on i40e only\n\n" + + "i40e_set_sym_hash_ena_per_pctype (port_id) (pctype)" + " enable|disable\n" + " set symmetric hash enable configuration per" + " pctype to enable or disable, on i40e only\n\n" + + "i40e_get_filter_swap (port_id) (pctype)\n" + " get filter swap configurations on i40e," + " on i40e only\n\n" + + "i40e_set_filter_swap (port_id) (pctype) (off0_src0)" + " (off0_src1) (len0) (off1_src0) (off1_src1) (len1)\n" + " set filter swap configurations, on i40e only\n\n" +#endif /* RTE_LIBRTE_I40E_PMD */ ); } } @@ -7304,6 +7336,421 @@ cmdline_parse_inst_t cmd_get_flex_filter = { }, }; +/* *** Classification Filters Control *** */ +#ifdef RTE_LIBRTE_I40E_PMD +/* *** Get symmetric hash enable per port *** */ +struct cmd_i40e_get_sym_hash_ena_per_port_result { + cmdline_fixed_string_t i40e_get_sym_hash_ena_per_port; + uint8_t port_id; +}; + +static void +cmd_i40e_get_sym_hash_per_port_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_i40e_get_sym_hash_ena_per_port_result *res = parsed_result; + uint8_t enable = 0; + int ret; + + if (rte_eth_dev_check_command_supported(res->port_id, + RTE_CMD_GET_SYM_HASH_ENABLE_PER_PORT) <= 0) { + printf("Command of RTE_CMD_GET_SYM_HASH_ENABLE_PER_PORT " + "not supported on port: %d\n", res->port_id); + return; + } + + ret = rte_eth_dev_rx_classification_filter_ctl(res->port_id, + RTE_CMD_GET_SYM_HASH_ENABLE_PER_PORT, &enable); + if (ret < 0) { + printf("Cannot get symmetric hash enable per port " + "on i40e port %u\n", res->port_id); + return; + } + + printf("Symmetric hash is %s on i40e port %u\n", + enable ? "enabled" : "disabled", res->port_id); +} + +cmdline_parse_token_string_t cmd_i40e_get_sym_hash_ena_per_port_all = + TOKEN_STRING_INITIALIZER( + struct cmd_i40e_get_sym_hash_ena_per_port_result, + i40e_get_sym_hash_ena_per_port, + "i40e_get_sym_hash_ena_per_port"); +cmdline_parse_token_num_t cmd_i40e_get_sym_hash_ena_per_port_port_id = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_get_sym_hash_ena_per_port_result, + port_id, UINT8); + +cmdline_parse_inst_t cmd_i40e_get_sym_hash_ena_per_port = { + .f = cmd_i40e_get_sym_hash_per_port_parsed, + .data = NULL, + .help_str = "i40e_get_sym_hash_ena_per_port port_id", + .tokens = { + (void *)&cmd_i40e_get_sym_hash_ena_per_port_all, + (void *)&cmd_i40e_get_sym_hash_ena_per_port_port_id, + NULL, + }, +}; + +/* *** Set symmetric hash enable per port *** */ +struct cmd_i40e_set_sym_hash_ena_per_port_result { + cmdline_fixed_string_t i40e_set_sym_hash_ena_per_port; + cmdline_fixed_string_t enable; + uint8_t port_id; +}; + +static void +cmd_i40e_set_sym_hash_per_port_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_i40e_set_sym_hash_ena_per_port_result *res = parsed_result; + uint8_t enable = 0; + int ret; + + if (rte_eth_dev_check_command_supported(res->port_id, + RTE_CMD_SET_SYM_HASH_ENABLE_PER_PORT) <= 0) { + printf("Command of RTE_CMD_SET_SYM_HASH_ENABLE_PER_PORT " + "not supported on port: %d\n", res->port_id); + return; + } + + if (!strcmp(res->enable, "enable")) + enable = 1; + ret = rte_eth_dev_rx_classification_filter_ctl(res->port_id, + RTE_CMD_SET_SYM_HASH_ENABLE_PER_PORT, &enable); + if (ret < 0) { + printf("Cannot set symmetric hash enable per port " + "on i40e port %u\n", res->port_id); + return; + } + + printf("Symmetric hash has been set to %s on i40e port %u\n", + res->enable, res->port_id); +} + +cmdline_parse_token_string_t cmd_i40e_set_sym_hash_ena_per_port_all = + TOKEN_STRING_INITIALIZER( + struct cmd_i40e_set_sym_hash_ena_per_port_result, + i40e_set_sym_hash_ena_per_port, + "i40e_set_sym_hash_ena_per_port"); +cmdline_parse_token_num_t cmd_i40e_set_sym_hash_ena_per_port_port_id = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_sym_hash_ena_per_port_result, + port_id, UINT8); +cmdline_parse_token_string_t cmd_i40e_set_sym_hash_ena_per_port_enable = + TOKEN_STRING_INITIALIZER( + struct cmd_i40e_set_sym_hash_ena_per_port_result, + enable, "enable#disable"); + +cmdline_parse_inst_t cmd_i40e_set_sym_hash_ena_per_port = { + .f = cmd_i40e_set_sym_hash_per_port_parsed, + .data = NULL, + .help_str = "i40e_set_sym_hash_ena_per_port port_id enable|disable", + .tokens = { + (void *)&cmd_i40e_set_sym_hash_ena_per_port_all, + (void *)&cmd_i40e_set_sym_hash_ena_per_port_port_id, + (void *)&cmd_i40e_set_sym_hash_ena_per_port_enable, + NULL, + }, +}; + +/* *** Get symmetric hash enable per pctype *** */ +struct cmd_i40e_get_sym_hash_ena_per_pctype_result { + cmdline_fixed_string_t i40e_get_sym_hash_ena_per_pctype; + uint8_t port_id; + uint8_t pctype; +}; + +static void +cmd_i40e_get_sym_hash_per_pctype_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_i40e_get_sym_hash_ena_per_pctype_result *res = + parsed_result; + struct rte_i40e_sym_hash_enable_info info; + int ret; + + if (rte_eth_dev_check_command_supported(res->port_id, + RTE_CMD_GET_SYM_HASH_ENABLE_PER_PCTYPE) <= 0) { + printf("Command of RTE_CMD_GET_SYM_HASH_ENABLE_PER_PCTYPE " + "not supported on port: %d\n", res->port_id); + return; + } + + memset(&info, 0, sizeof(info)); + info.pctype = res->pctype; + ret = rte_eth_dev_rx_classification_filter_ctl(res->port_id, + RTE_CMD_GET_SYM_HASH_ENABLE_PER_PCTYPE, &info); + if (ret < 0) { + printf("Cannot get symmetric hash enable per pctype on i40e " + "port %u, pctype %u\n", res->port_id, res->pctype); + return; + } + printf("Symmetric hash is %s on i40e port %u, pctype %u\n", + info.enable ? "enabled" : "disabled", + res->port_id, res->pctype); +} + +cmdline_parse_token_string_t cmd_i40e_get_sym_hash_ena_per_pctype_all = + TOKEN_STRING_INITIALIZER( + struct cmd_i40e_get_sym_hash_ena_per_pctype_result, + i40e_get_sym_hash_ena_per_pctype, + "i40e_get_sym_hash_ena_per_pctype"); +cmdline_parse_token_num_t cmd_i40e_get_sym_hash_ena_per_pctype_port_id = + TOKEN_NUM_INITIALIZER( + struct cmd_i40e_get_sym_hash_ena_per_pctype_result, + port_id, UINT8); +cmdline_parse_token_num_t cmd_i40e_get_sym_hash_ena_per_pctype_pctype = + TOKEN_NUM_INITIALIZER( + struct cmd_i40e_get_sym_hash_ena_per_pctype_result, + pctype, UINT8); + +cmdline_parse_inst_t cmd_i40e_get_sym_hash_ena_per_pctype = { + .f = cmd_i40e_get_sym_hash_per_pctype_parsed, + .data = NULL, + .help_str = "i40e_get_sym_hash_ena_per_pctype port_id pctype", + .tokens = { + (void *)&cmd_i40e_get_sym_hash_ena_per_pctype_all, + (void *)&cmd_i40e_get_sym_hash_ena_per_pctype_port_id, + (void *)&cmd_i40e_get_sym_hash_ena_per_pctype_pctype, + NULL, + }, +}; + +/* *** Set symmetric hash enable per pctype *** */ +struct cmd_i40e_set_sym_hash_ena_per_pctype_result { + cmdline_fixed_string_t i40e_set_sym_hash_ena_per_pctype; + cmdline_fixed_string_t enable; + uint8_t port_id; + uint8_t pctype; +}; + +static void +cmd_i40e_set_sym_hash_per_pctype_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_i40e_set_sym_hash_ena_per_pctype_result *res = + parsed_result; + struct rte_i40e_sym_hash_enable_info info; + int ret; + + if (rte_eth_dev_check_command_supported(res->port_id, + RTE_CMD_SET_SYM_HASH_ENABLE_PER_PCTYPE) <= 0) { + printf("Command of RTE_CMD_SET_SYM_HASH_ENABLE_PER_PCTYPE " + "not supported on port: %d\n", res->port_id); + return; + } + + memset(&info, 0, sizeof(info)); + info.pctype = res->pctype; + if (!strcmp(res->enable, "enable")) + info.enable = 1; + ret = rte_eth_dev_rx_classification_filter_ctl(res->port_id, + RTE_CMD_SET_SYM_HASH_ENABLE_PER_PCTYPE, &info); + if (ret < 0) { + printf("Cannot set symmetric hash enable per pctype to %s " + "on i40e port %u, pctype %u\n", res->enable ? + "enabled" : "disabled", res->port_id, res->pctype); + return; + } + printf("Symmetic hash has been set to %s on i40e port %u, pctype %u\n", + res->enable, res->port_id, res->pctype); +} + +cmdline_parse_token_string_t cmd_i40e_set_sym_hash_ena_per_pctype_all = + TOKEN_STRING_INITIALIZER( + struct cmd_i40e_set_sym_hash_ena_per_pctype_result, + i40e_set_sym_hash_ena_per_pctype, + "i40e_set_sym_hash_ena_per_pctype"); +cmdline_parse_token_num_t cmd_i40e_set_sym_hash_ena_per_pctype_port_id = + TOKEN_NUM_INITIALIZER( + struct cmd_i40e_set_sym_hash_ena_per_pctype_result, + port_id, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_sym_hash_ena_per_pctype_pctype = + TOKEN_NUM_INITIALIZER( + struct cmd_i40e_set_sym_hash_ena_per_pctype_result, + pctype, UINT8); +cmdline_parse_token_string_t cmd_i40e_set_sym_hash_ena_per_pctype_enable = + TOKEN_STRING_INITIALIZER( + struct cmd_i40e_set_sym_hash_ena_per_pctype_result, + enable, "enable#disable"); + +cmdline_parse_inst_t cmd_i40e_set_sym_hash_ena_per_pctype = { + .f = cmd_i40e_set_sym_hash_per_pctype_parsed, + .data = NULL, + .help_str = "i40e_set_sym_hash_ena_per_pctype pord_id " + "pctype enable|disable", + .tokens = { + (void *)&cmd_i40e_set_sym_hash_ena_per_pctype_all, + (void *)&cmd_i40e_set_sym_hash_ena_per_pctype_port_id, + (void *)&cmd_i40e_set_sym_hash_ena_per_pctype_pctype, + (void *)&cmd_i40e_set_sym_hash_ena_per_pctype_enable, + NULL, + }, +}; + +/* *** Get filter swap *** */ +struct cmd_i40e_get_filter_swap_result { + cmdline_fixed_string_t i40e_get_filter_swap; + uint8_t port_id; + uint8_t pctype; +}; + +static void +cmd_i40e_get_filter_swap_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_i40e_get_filter_swap_result *res = parsed_result; + struct rte_i40e_filter_swap_info info; + int ret; + + if (rte_eth_dev_check_command_supported(res->port_id, + RTE_CMD_GET_FILTER_SWAP) <= 0) { + printf("Command of RTE_CMD_GET_FILTER_SWAP not supported " + "on port: %d\n", res->port_id); + return; + } + + memset(&info, 0, sizeof(info)); + info.pctype = res->pctype; + ret = rte_eth_dev_rx_classification_filter_ctl(res->port_id, + RTE_CMD_GET_FILTER_SWAP, &info); + if (ret < 0) { + printf("Cannot get filter swap on i40e port %u, pctype %u\n", + res->port_id, res->pctype); + return; + } + printf("Filter swap of i40e port %u, pctype %u is configured as:\n" + "off0_src0: 0x%02x, off0_src1: 0x%02x, len0: 0x%02x\n" + "off1_src0: 0x%02x, off1_src1: 0x%02x, len1: 0x%02x\n", + res->port_id, res->pctype, info.off0_src0, info.off0_src1, + info.len0, info.off1_src0, info.off1_src1, info.len1); +} + +cmdline_parse_token_string_t cmd_i40e_get_filter_swap_all = + TOKEN_STRING_INITIALIZER(struct cmd_i40e_get_filter_swap_result, + i40e_get_filter_swap, "i40e_get_filter_swap"); +cmdline_parse_token_num_t cmd_i40e_get_filter_swap_port_id = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_get_filter_swap_result, + port_id, UINT8); +cmdline_parse_token_num_t cmd_i40e_get_filter_swap_pctype = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_get_filter_swap_result, + pctype, UINT8); + +cmdline_parse_inst_t cmd_i40e_get_filter_swap = { + .f = cmd_i40e_get_filter_swap_parsed, + .data = NULL, + .help_str = "i40e_get_filter_swap port_id pctype", + .tokens = { + (void *)&cmd_i40e_get_filter_swap_all, + (void *)&cmd_i40e_get_filter_swap_port_id, + (void *)&cmd_i40e_get_filter_swap_pctype, + NULL, + }, +}; + +/* *** Set filter swap *** */ +struct cmd_i40e_set_filter_swap_result { + cmdline_fixed_string_t i40e_set_filter_swap; + uint8_t port_id; + uint8_t pctype; + uint8_t off0_src0; + uint8_t off0_src1; + uint8_t len0; + uint8_t off1_src0; + uint8_t off1_src1; + uint8_t len1; +}; + +static void +cmd_i40e_set_filter_swap_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_i40e_set_filter_swap_result *res = parsed_result; + struct rte_i40e_filter_swap_info info; + int ret; + + if (rte_eth_dev_check_command_supported(res->port_id, + RTE_CMD_SET_FILTER_SWAP) <= 0) { + printf("Command of RTE_CMD_SET_FILTER_SWAP not supported " + "on port: %d\n", res->port_id); + return; + } + + memset(&info, 0, sizeof(info)); + info.pctype = res->pctype; + info.off0_src0 = res->off0_src0; + info.off0_src1 = res->off0_src1; + info.len0 = res->len0; + info.off1_src0 = res->off1_src0; + info.off1_src1 = res->off1_src1; + info.len1 = res->len1; + ret = rte_eth_dev_rx_classification_filter_ctl(res->port_id, + RTE_CMD_SET_FILTER_SWAP, &info); + if (ret < 0) { + printf("Cannot set filter swap on i40e port %u, pctype %u\n", + res->port_id, res->pctype); + return; + } + printf("Filter swap of i40e port %u, pctype %u has been set as:\n" + "off0_src0: 0x%02x, off0_src1: 0x%02x, len0: 0x%02x\n" + "off1_src0: 0x%02x, off1_src1: 0x%02x, len1: 0x%02x\n", + res->port_id, res->pctype, info.off0_src0, info.off0_src1, + info.len0, info.off1_src0, info.off1_src1, info.len1); +} + +cmdline_parse_token_string_t cmd_i40e_set_filter_swap_all = + TOKEN_STRING_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + i40e_set_filter_swap, "i40e_set_filter_swap"); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_port_id = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + port_id, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_pctype = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + pctype, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_off0_src0 = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + off0_src0, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_off0_src1 = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + off0_src1, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_len0 = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + len0, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_off1_src0 = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + off1_src0, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_off1_src1 = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + off1_src1, UINT8); +cmdline_parse_token_num_t cmd_i40e_set_filter_swap_len1 = + TOKEN_NUM_INITIALIZER(struct cmd_i40e_set_filter_swap_result, + len1, UINT8); + +cmdline_parse_inst_t cmd_i40e_set_filter_swap = { + .f = cmd_i40e_set_filter_swap_parsed, + .data = NULL, + .help_str = "i40e_set_filter_swap port_id pctype off0_src0 off0_src1 " + "len0 off1_src0 off1_src1 len1", + .tokens = { + (void *)&cmd_i40e_set_filter_swap_all, + (void *)&cmd_i40e_set_filter_swap_port_id, + (void *)&cmd_i40e_set_filter_swap_pctype, + (void *)&cmd_i40e_set_filter_swap_off0_src0, + (void *)&cmd_i40e_set_filter_swap_off0_src1, + (void *)&cmd_i40e_set_filter_swap_len0, + (void *)&cmd_i40e_set_filter_swap_off1_src0, + (void *)&cmd_i40e_set_filter_swap_off1_src1, + (void *)&cmd_i40e_set_filter_swap_len1, + NULL, + }, +}; +#endif /* RTE_LIBRTE_I40E_PMD */ + /* ******************************************************************************** */ /* list of instructions */ @@ -7429,6 +7876,14 @@ cmdline_parse_ctx_t main_ctx[] = { (cmdline_parse_inst_t *)&cmd_add_flex_filter, (cmdline_parse_inst_t *)&cmd_remove_flex_filter, (cmdline_parse_inst_t *)&cmd_get_flex_filter, +#ifdef RTE_LIBRTE_I40E_PMD + (cmdline_parse_inst_t *)&cmd_i40e_get_sym_hash_ena_per_port, + (cmdline_parse_inst_t *)&cmd_i40e_set_sym_hash_ena_per_port, + (cmdline_parse_inst_t *)&cmd_i40e_get_sym_hash_ena_per_pctype, + (cmdline_parse_inst_t *)&cmd_i40e_set_sym_hash_ena_per_pctype, + (cmdline_parse_inst_t *)&cmd_i40e_get_filter_swap, + (cmdline_parse_inst_t *)&cmd_i40e_set_filter_swap, +#endif /* RTE_LIBRTE_I40E_PMD */ NULL, };