net/nfp: read chip model from PluDevice register

Message ID 20210125152544.2879-1-heinrich.kuhn@netronome.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series net/nfp: read chip model from PluDevice register |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Functional success Functional Testing PASS
ci/iol-testing warning Testing issues

Commit Message

Heinrich Kuhn Jan. 25, 2021, 3:25 p.m. UTC
  For newer smartNIC NVRAM versions the chip model should be read from the
PluDevice register as it provides the authoritative chip model/revision.
This method of reading the chip model is backwards compatible with
legacy NVRAM versions too.

Since the model number is purely used for reporting purposes, follow the
hardware team convention of subtracting 0x10 from the PluDevice register
to obtain the chip model/revision number.

Fixes: c7e9729da ("net/nfp: support CPP")
Cc: stable@dpdk.org

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Reviewed-by: Louis Peens <louis.peens@netronome.com>
Signed-off-by: Simon Horman <simon.horman@netronome.com>
---
 drivers/net/nfp/nfpcore/nfp_cpp.h     |  2 +-
 drivers/net/nfp/nfpcore/nfp_cppcore.c | 49 ++++++++++++---------------
 2 files changed, 23 insertions(+), 28 deletions(-)
  

Comments

Ferruh Yigit Jan. 29, 2021, 11:35 a.m. UTC | #1
On 1/25/2021 3:25 PM, Heinrich Kuhn wrote:
> For newer smartNIC NVRAM versions the chip model should be read from the
> PluDevice register as it provides the authoritative chip model/revision.
> This method of reading the chip model is backwards compatible with
> legacy NVRAM versions too.
> 
> Since the model number is purely used for reporting purposes, follow the
> hardware team convention of subtracting 0x10 from the PluDevice register
> to obtain the chip model/revision number.
> 
> Fixes: c7e9729da ("net/nfp: support CPP")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
> Reviewed-by: Louis Peens <louis.peens@netronome.com>
> Signed-off-by: Simon Horman <simon.horman@netronome.com>

Applied to dpdk-next-net/main, thanks.
  

Patch

diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h
index 1427954c1..08d656da1 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp.h
+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h
@@ -170,7 +170,7 @@  void *nfp_cpp_priv(struct nfp_cpp *cpp);
  */
 void *nfp_cpp_area_priv(struct nfp_cpp_area *cpp_area);
 
-uint32_t __nfp_cpp_model_autodetect(struct nfp_cpp *cpp);
+uint32_t __nfp_cpp_model_autodetect(struct nfp_cpp *cpp, uint32_t *model);
 
 /*
  * NFP CPP core interface for CPP clients.
diff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c
index dec4a8b6d..6d629430d 100644
--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c
+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c
@@ -22,8 +22,9 @@ 
 
 #define NFP_PL_DEVICE_ID                        0x00000004
 #define NFP_PL_DEVICE_ID_MASK                   0xff
-
-#define NFP6000_ARM_GCSR_SOFTMODEL0             0x00400144
+#define NFP_PL_DEVICE_PART_MASK                 0xffff0000
+#define NFP_PL_DEVICE_MODEL_MASK               (NFP_PL_DEVICE_PART_MASK | \
+						NFP_PL_DEVICE_ID_MASK)
 
 void
 nfp_cpp_priv_set(struct nfp_cpp *cpp, void *priv)
@@ -46,13 +47,18 @@  nfp_cpp_model_set(struct nfp_cpp *cpp, uint32_t model)
 uint32_t
 nfp_cpp_model(struct nfp_cpp *cpp)
 {
+	int err;
+	uint32_t model;
+
 	if (!cpp)
 		return NFP_CPP_MODEL_INVALID;
 
-	if (cpp->model == 0)
-		cpp->model = __nfp_cpp_model_autodetect(cpp);
+	err = __nfp_cpp_model_autodetect(cpp, &model);
 
-	return cpp->model;
+	if (err < 0)
+		return err;
+
+	return model;
 }
 
 void
@@ -389,9 +395,6 @@  nfp_xpb_to_cpp(struct nfp_cpp *cpp, uint32_t *xpb_addr)
 	uint32_t xpb;
 	int island;
 
-	if (!NFP_CPP_MODEL_IS_6000(cpp->model))
-		return 0;
-
 	xpb = NFP_CPP_ID(14, NFP_CPP_ACTION_RW, 0);
 
 	/*
@@ -796,29 +799,21 @@  nfp_cpp_area_fill(struct nfp_cpp_area *area, unsigned long offset,
  * as those are model-specific
  */
 uint32_t
-__nfp_cpp_model_autodetect(struct nfp_cpp *cpp)
+__nfp_cpp_model_autodetect(struct nfp_cpp *cpp, uint32_t *model)
 {
-	uint32_t arm_id = NFP_CPP_ID(NFP_CPP_TARGET_ARM, 0, 0);
-	uint32_t model = 0;
-
-	if (nfp_cpp_readl(cpp, arm_id, NFP6000_ARM_GCSR_SOFTMODEL0, &model))
-		return 0;
-
-	if (NFP_CPP_MODEL_IS_6000(model)) {
-		uint32_t tmp;
-
-		nfp_cpp_model_set(cpp, model);
+	uint32_t reg;
+	int err;
 
-		/* The PL's PluDeviceID revision code is authoratative */
-		model &= ~0xff;
-		if (nfp_xpb_readl(cpp, NFP_XPB_DEVICE(1, 1, 16) +
-				   NFP_PL_DEVICE_ID, &tmp))
-			return 0;
+	err = nfp_xpb_readl(cpp, NFP_XPB_DEVICE(1, 1, 16) + NFP_PL_DEVICE_ID,
+			    &reg);
+	if (err < 0)
+		return err;
 
-		model |= (NFP_PL_DEVICE_ID_MASK & tmp) - 0x10;
-	}
+	*model = reg & NFP_PL_DEVICE_MODEL_MASK;
+	if (*model & NFP_PL_DEVICE_ID_MASK)
+		*model -= 0x10;
 
-	return model;
+	return 0;
 }
 
 /*