[v1,30/38] net/mvpp2: expose max mtu size

  From: Liron Himi <lironh@marvell.com>

expose max-mtu based on the max frame size that
l4 checksum generation can be done by HW.

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
---
 drivers/net/mvpp2/mrvl_ethdev.c | 24 ++++++++++++++++++++++--
 drivers/net/mvpp2/mrvl_ethdev.h |  1 +
 2 files changed, 23 insertions(+), 2 deletions(-)
  

Reviewed-by: Michael Shamis <michaelsh@marvell.com>

-----Original Message-----
From: dev <dev-bounces@dpdk.org> On Behalf Of lironh@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>
Cc: dev@dpdk.org; Liron Himi <lironh@marvell.com>; Yuri Chipchev <yuric@marvell.com>
Subject: [dpdk-dev] [PATCH v1 30/38] net/mvpp2: expose max mtu size

From: Liron Himi <lironh@marvell.com>

expose max-mtu based on the max frame size that
l4 checksum generation can be done by HW.

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
---
 drivers/net/mvpp2/mrvl_ethdev.c | 24 ++++++++++++++++++++++--  drivers/net/mvpp2/mrvl_ethdev.h |  1 +
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 535d7cc60..9fd9269eb 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -477,9 +477,17 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
 		return -EINVAL;
 	}
 
-	if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
+	if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) 
+{
 		dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 				 MRVL_PP2_ETH_HDRS_LEN;
+		if (dev->data->mtu > priv->max_mtu) {
+			MRVL_LOG(ERR, "inherit MTU %u from max_rx_pkt_len %u is larger than max_mtu %u\n",
+				 dev->data->mtu,
+				 dev->data->dev_conf.rxmode.max_rx_pkt_len,
+				 priv->max_mtu);
+			return -EINVAL;
+		}
+	}
 
 	if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 		priv->multiseg = 1;
@@ -1676,9 +1684,11 @@ mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
  *   Info structure output buffer.
  */
 static int
-mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
+mrvl_dev_infos_get(struct rte_eth_dev *dev,
 		   struct rte_eth_dev_info *info)
 {
+	struct mrvl_priv *priv = dev->data->dev_private;
+
 	info->speed_capa = ETH_LINK_SPEED_10M |
 			   ETH_LINK_SPEED_100M |
 			   ETH_LINK_SPEED_1G |
@@ -1710,6 +1720,7 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 	info->default_rxconf.rx_drop_en = 1;
 
 	info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
+	info->max_mtu = priv->max_mtu;
 
 	return 0;
 }
@@ -3125,6 +3136,7 @@ mrvl_priv_create(const char *dev_name)
 	struct pp2_bpool_params bpool_params;
 	char match[MRVL_MATCH_LEN];
 	struct mrvl_priv *priv;
+	uint16_t max_frame_size;
 	int ret, bpool_bit;
 
 	priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id()); @@ -3136,6 +3148,14 @@ mrvl_priv_create(const char *dev_name)
 	if (ret)
 		goto out_free_priv;
 
+	ret = pp2_ppio_get_l4_cksum_max_frame_size(priv->pp_id, priv->ppio_id,
+						   &max_frame_size);
+	if (ret)
+		goto out_free_priv;
+
+	priv->max_mtu = max_frame_size + RTE_ETHER_CRC_LEN -
+		MRVL_PP2_ETH_HDRS_LEN;
+
 	bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
 				     PP2_BPOOL_NUM_POOLS);
 	if (bpool_bit < 0)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h index 24dbe20d7..ada2c51b2 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -160,6 +160,7 @@ struct mrvl_priv {
 	uint8_t vlan_flushed;
 	uint8_t isolated;
 	uint8_t multiseg;
+	uint16_t max_mtu;
 
 	struct pp2_ppio_params ppio_params;
 	struct pp2_cls_qos_tbl_params qos_tbl_params;
--
2.28.0