net/i40e: fix FDIR issue for ETH + VLAN pattern
diff mbox series

Message ID 20201027062147.100445-1-beilei.xing@intel.com
State Accepted, archived
Delegated to: Qi Zhang
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Series
  • net/i40e: fix FDIR issue for ETH + VLAN pattern
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Context Check Description
ci/Intel-compilation fail Compilation issues
ci/travis-robot warning Travis build: failed
ci/iol-testing fail Testing issues
ci/checkpatch success coding style OK

Commit Message

Xing, Beilei Oct. 27, 2020, 6:21 a.m. UTC
From: Beilei Xing <beilei.xing@intel.com>

Currently, can't create more than one following flow for
ETH + VLAN pattern.

1. flow create 0 ingress pattern eth / vlan vid is 350 / end
   actions queue index 2 / end
2. flow create 0 ingress pattern eth / vlan vid is 351 / end
   actions queue index 3 / end

The root cause is the vlan_tci is not set correctly, it will
cause  the keys of both of the two flows are the same.

Fixes: 42044b69c67d ("net/i40e: support input set selection for FDIR")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
 drivers/net/i40e/i40e_flow.c | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

Comments

Guo, Jia Oct. 26, 2020, 7:14 a.m. UTC | #1
Acked-by: Jeff Guo <jia.guo@intel.com>

> -----Original Message-----
> From: Xing, Beilei <beilei.xing@intel.com>
> Sent: Tuesday, October 27, 2020 2:22 PM
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Xing, Beilei <beilei.xing@intel.com>;
> stable@dpdk.org
> Subject: [PATCH] net/i40e: fix FDIR issue for ETH + VLAN pattern
> 
> From: Beilei Xing <beilei.xing@intel.com>
> 
> Currently, can't create more than one following flow for ETH + VLAN pattern.
> 
> 1. flow create 0 ingress pattern eth / vlan vid is 350 / end
>    actions queue index 2 / end
> 2. flow create 0 ingress pattern eth / vlan vid is 351 / end
>    actions queue index 3 / end
> 
> The root cause is the vlan_tci is not set correctly, it will cause  the keys of
> both of the two flows are the same.
> 
> Fixes: 42044b69c67d ("net/i40e: support input set selection for FDIR")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> ---
>  drivers/net/i40e/i40e_flow.c | 35 ++++++++++++++++++++++++-----------
>  1 file changed, 24 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index 8e7a9989b3..5bec0c7a84 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -27,7 +27,10 @@
>  #define I40E_IPV6_TC_MASK	(0xFF << I40E_FDIR_IPv6_TC_OFFSET)
>  #define I40E_IPV6_FRAG_HEADER	44
>  #define I40E_TENANT_ARRAY_NUM	3
> -#define I40E_TCI_MASK		0xFFFF
> +#define I40E_VLAN_TCI_MASK	0xFFFF
> +#define I40E_VLAN_PRI_MASK	0xE000
> +#define I40E_VLAN_CFI_MASK	0x1000
> +#define I40E_VLAN_VID_MASK	0x0FFF
> 
>  static int i40e_flow_validate(struct rte_eth_dev *dev,
>  			      const struct rte_flow_attr *attr, @@ -2705,12
> +2708,22 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
> 
>  			RTE_ASSERT(!(input_set &
> I40E_INSET_LAST_ETHER_TYPE));
>  			if (vlan_spec && vlan_mask) {
> -				if (vlan_mask->tci ==
> -				    rte_cpu_to_be_16(I40E_TCI_MASK)) {
> -					input_set |=
> I40E_INSET_VLAN_INNER;
> -					filter->input.flow_ext.vlan_tci =
> -						vlan_spec->tci;
> +				if (vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_VLAN_TCI_MASK)
> &&
> +				    vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_VLAN_PRI_MASK)
> &&
> +				    vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_VLAN_CFI_MASK)
> &&
> +				    vlan_mask->tci !=
> +
> rte_cpu_to_be_16(I40E_VLAN_VID_MASK)) {
> +					rte_flow_error_set(error, EINVAL,
> +
> RTE_FLOW_ERROR_TYPE_ITEM,
> +						   item,
> +						   "Unsupported TCI mask.");
>  				}
> +				input_set |= I40E_INSET_VLAN_INNER;
> +				filter->input.flow_ext.vlan_tci =
> +					vlan_spec->tci;
>  			}
>  			if (vlan_spec && vlan_mask && vlan_mask-
> >inner_type) {
>  				if (vlan_mask->inner_type !=
> RTE_BE16(0xffff)) { @@ -3894,10 +3907,10 @@
> i40e_flow_parse_vxlan_pattern(__rte_unused struct rte_eth_dev *dev,
> 
>  			if (vlan_spec && vlan_mask) {
>  				if (vlan_mask->tci ==
> -				    rte_cpu_to_be_16(I40E_TCI_MASK))
> +				    rte_cpu_to_be_16(I40E_VLAN_TCI_MASK))
>  					filter->inner_vlan =
>  					      rte_be_to_cpu_16(vlan_spec->tci)
> &
> -					      I40E_TCI_MASK;
> +					      I40E_VLAN_TCI_MASK;
>  				filter_type |= ETH_TUNNEL_FILTER_IVLAN;
>  			}
>  			break;
> @@ -4125,10 +4138,10 @@ i40e_flow_parse_nvgre_pattern(__rte_unused
> struct rte_eth_dev *dev,
> 
>  			if (vlan_spec && vlan_mask) {
>  				if (vlan_mask->tci ==
> -				    rte_cpu_to_be_16(I40E_TCI_MASK))
> +				    rte_cpu_to_be_16(I40E_VLAN_TCI_MASK))
>  					filter->inner_vlan =
>  					      rte_be_to_cpu_16(vlan_spec->tci)
> &
> -					      I40E_TCI_MASK;
> +					      I40E_VLAN_TCI_MASK;
>  				filter_type |= ETH_TUNNEL_FILTER_IVLAN;
>  			}
>  			break;
> @@ -4800,7 +4813,7 @@ i40e_flow_parse_rss_pattern(__rte_unused struct
> rte_eth_dev *dev,
>  			vlan_mask = item->mask;
>  			if (vlan_spec && vlan_mask) {
>  				if (vlan_mask->tci ==
> -					rte_cpu_to_be_16(I40E_TCI_MASK))
> {
> +
> 	rte_cpu_to_be_16(I40E_VLAN_TCI_MASK)) {
>  					info->region[0].user_priority[0] =
>  						(rte_be_to_cpu_16(
>  						vlan_spec->tci) >> 13) & 0x7;
> --
> 2.26.2
Zhang, Qi Z Oct. 27, 2020, 12:03 a.m. UTC | #2
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guo, Jia
> Sent: Monday, October 26, 2020 3:15 PM
> To: Xing, Beilei <beilei.xing@intel.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] net/i40e: fix FDIR issue for ETH + VLAN pattern
> 
> Acked-by: Jeff Guo <jia.guo@intel.com>
> 
> > -----Original Message-----
> > From: Xing, Beilei <beilei.xing@intel.com>
> > Sent: Tuesday, October 27, 2020 2:22 PM
> > To: dev@dpdk.org
> > Cc: Guo, Jia <jia.guo@intel.com>; Xing, Beilei
> > <beilei.xing@intel.com>; stable@dpdk.org
> > Subject: [PATCH] net/i40e: fix FDIR issue for ETH + VLAN pattern
> >
> > From: Beilei Xing <beilei.xing@intel.com>
> >
> > Currently, can't create more than one following flow for ETH + VLAN pattern.
> >
> > 1. flow create 0 ingress pattern eth / vlan vid is 350 / end
> >    actions queue index 2 / end
> > 2. flow create 0 ingress pattern eth / vlan vid is 351 / end
> >    actions queue index 3 / end
> >
> > The root cause is the vlan_tci is not set correctly, it will cause
> > the keys of both of the two flows are the same.
> >
> > Fixes: 42044b69c67d ("net/i40e: support input set selection for FDIR")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> > ---

Applied to dpdk-next-net-intel.

Thanks
Qi

Patch
diff mbox series

diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index 8e7a9989b3..5bec0c7a84 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -27,7 +27,10 @@ 
 #define I40E_IPV6_TC_MASK	(0xFF << I40E_FDIR_IPv6_TC_OFFSET)
 #define I40E_IPV6_FRAG_HEADER	44
 #define I40E_TENANT_ARRAY_NUM	3
-#define I40E_TCI_MASK		0xFFFF
+#define I40E_VLAN_TCI_MASK	0xFFFF
+#define I40E_VLAN_PRI_MASK	0xE000
+#define I40E_VLAN_CFI_MASK	0x1000
+#define I40E_VLAN_VID_MASK	0x0FFF
 
 static int i40e_flow_validate(struct rte_eth_dev *dev,
 			      const struct rte_flow_attr *attr,
@@ -2705,12 +2708,22 @@  i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
 
 			RTE_ASSERT(!(input_set & I40E_INSET_LAST_ETHER_TYPE));
 			if (vlan_spec && vlan_mask) {
-				if (vlan_mask->tci ==
-				    rte_cpu_to_be_16(I40E_TCI_MASK)) {
-					input_set |= I40E_INSET_VLAN_INNER;
-					filter->input.flow_ext.vlan_tci =
-						vlan_spec->tci;
+				if (vlan_mask->tci !=
+				    rte_cpu_to_be_16(I40E_VLAN_TCI_MASK) &&
+				    vlan_mask->tci !=
+				    rte_cpu_to_be_16(I40E_VLAN_PRI_MASK) &&
+				    vlan_mask->tci !=
+				    rte_cpu_to_be_16(I40E_VLAN_CFI_MASK) &&
+				    vlan_mask->tci !=
+				    rte_cpu_to_be_16(I40E_VLAN_VID_MASK)) {
+					rte_flow_error_set(error, EINVAL,
+						   RTE_FLOW_ERROR_TYPE_ITEM,
+						   item,
+						   "Unsupported TCI mask.");
 				}
+				input_set |= I40E_INSET_VLAN_INNER;
+				filter->input.flow_ext.vlan_tci =
+					vlan_spec->tci;
 			}
 			if (vlan_spec && vlan_mask && vlan_mask->inner_type) {
 				if (vlan_mask->inner_type != RTE_BE16(0xffff)) {
@@ -3894,10 +3907,10 @@  i40e_flow_parse_vxlan_pattern(__rte_unused struct rte_eth_dev *dev,
 
 			if (vlan_spec && vlan_mask) {
 				if (vlan_mask->tci ==
-				    rte_cpu_to_be_16(I40E_TCI_MASK))
+				    rte_cpu_to_be_16(I40E_VLAN_TCI_MASK))
 					filter->inner_vlan =
 					      rte_be_to_cpu_16(vlan_spec->tci) &
-					      I40E_TCI_MASK;
+					      I40E_VLAN_TCI_MASK;
 				filter_type |= ETH_TUNNEL_FILTER_IVLAN;
 			}
 			break;
@@ -4125,10 +4138,10 @@  i40e_flow_parse_nvgre_pattern(__rte_unused struct rte_eth_dev *dev,
 
 			if (vlan_spec && vlan_mask) {
 				if (vlan_mask->tci ==
-				    rte_cpu_to_be_16(I40E_TCI_MASK))
+				    rte_cpu_to_be_16(I40E_VLAN_TCI_MASK))
 					filter->inner_vlan =
 					      rte_be_to_cpu_16(vlan_spec->tci) &
-					      I40E_TCI_MASK;
+					      I40E_VLAN_TCI_MASK;
 				filter_type |= ETH_TUNNEL_FILTER_IVLAN;
 			}
 			break;
@@ -4800,7 +4813,7 @@  i40e_flow_parse_rss_pattern(__rte_unused struct rte_eth_dev *dev,
 			vlan_mask = item->mask;
 			if (vlan_spec && vlan_mask) {
 				if (vlan_mask->tci ==
-					rte_cpu_to_be_16(I40E_TCI_MASK)) {
+					rte_cpu_to_be_16(I40E_VLAN_TCI_MASK)) {
 					info->region[0].user_priority[0] =
 						(rte_be_to_cpu_16(
 						vlan_spec->tci) >> 13) & 0x7;