[1/3] common/sfc_efx: introduce 128-bit unsigned integer compat
diff mbox series

Message ID 1603369447-28388-1-git-send-email-arybchenko@solarflare.com
State Accepted
Delegated to: Ferruh Yigit
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Series
  • [1/3] common/sfc_efx: introduce 128-bit unsigned integer compat
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Context Check Description
ci/checkpatch success coding style OK

Commit Message

Andrew Rybchenko Oct. 22, 2020, 12:24 p.m. UTC
Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat
efsys_uint128_t to be used in driver source and have either __u128i
or __uint128_t behind.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
---
 drivers/common/sfc_efx/base/efx_types.h |  8 ++++----
 drivers/common/sfc_efx/efsys.h          | 19 ++++++++++---------
 2 files changed, 14 insertions(+), 13 deletions(-)

Comments

Ferruh Yigit Oct. 30, 2020, 9:04 a.m. UTC | #1
On 10/22/2020 1:24 PM, Andrew Rybchenko wrote:
> Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat
> efsys_uint128_t to be used in driver source and have either __u128i
> or __uint128_t behind.
> 
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> Reviewed-by: Andy Moreton <amoreton@xilinx.com>

Series applied to dpdk-next-net/main, thanks.
Thomas Monjalon Nov. 4, 2020, 4:29 p.m. UTC | #2
22/10/2020 14:24, Andrew Rybchenko:
> Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat
> efsys_uint128_t to be used in driver source and have either __u128i
> or __uint128_t behind.

Could we do something in EAL for this common need?
Honnappa Nagarahalli Nov. 4, 2020, 4:41 p.m. UTC | #3
<snip>

> 
> 22/10/2020 14:24, Andrew Rybchenko:
> > Intel SSE has __m128i, but ARMv8 has __uint128_t. So, add compat
> > efsys_uint128_t to be used in driver source and have either __u128i or
> > __uint128_t behind.
> 
> Could we do something in EAL for this common need?
rte_int128_t is defined in EAL.

>

Patch
diff mbox series

diff --git a/drivers/common/sfc_efx/base/efx_types.h b/drivers/common/sfc_efx/base/efx_types.h
index f7ec9a7..d67d07b 100644
--- a/drivers/common/sfc_efx/base/efx_types.h
+++ b/drivers/common/sfc_efx/base/efx_types.h
@@ -221,8 +221,8 @@ 
 	efx_word_t eo_word[8];
 	efx_dword_t eo_dword[4];
 	efx_qword_t eo_qword[2];
-#if EFSYS_HAS_SSE2_M128
-	__m128i eo_u128[1];
+#if EFSYS_HAS_UINT128
+	efsys_uint128_t eo_u128[1];
 #endif
 #if EFSYS_HAS_UINT64
 	uint64_t eo_u64[2];
@@ -243,8 +243,8 @@ 
 	efx_dword_t ex_dword[8];
 	efx_qword_t ex_qword[4];
 	efx_oword_t ex_oword[2];
-#if EFSYS_HAS_SSE2_M128
-	__m128i ex_u128[2];
+#if EFSYS_HAS_UINT128
+	efsys_uint128_t ex_u128[2];
 #endif
 #if EFSYS_HAS_UINT64
 	uint64_t ex_u64[4];
diff --git a/drivers/common/sfc_efx/efsys.h b/drivers/common/sfc_efx/efsys.h
index bbe9f2e..139f4d8 100644
--- a/drivers/common/sfc_efx/efsys.h
+++ b/drivers/common/sfc_efx/efsys.h
@@ -39,7 +39,8 @@ 
 
 #define EFSYS_HAS_UINT64 1
 #define EFSYS_USE_UINT64 1
-#define EFSYS_HAS_SSE2_M128 1
+#define EFSYS_HAS_UINT128 1
+typedef __m128i efsys_uint128_t;
 
 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
 #define EFSYS_IS_BIG_ENDIAN 1
@@ -272,13 +273,13 @@ 
 #define EFSYS_MEM_READO(_esmp, _offset, _eop)				\
 	do {								\
 		volatile uint8_t *_base = (_esmp)->esm_base;		\
-		volatile __m128i *_addr;				\
+		volatile efsys_uint128_t *_addr;			\
 									\
 		_NOTE(CONSTANTCONDITION);				\
 		SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,	\
 						sizeof(efx_oword_t)));	\
 									\
-		_addr = (volatile __m128i *)(_base + (_offset));	\
+		_addr = (volatile efsys_uint128_t *)(_base + (_offset));\
 		(_eop)->eo_u128[0] = _addr[0];				\
 									\
 		EFSYS_PROBE5(mem_reado, unsigned int, (_offset),	\
@@ -331,7 +332,7 @@ 
 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)				\
 	do {								\
 		volatile uint8_t *_base = (_esmp)->esm_base;		\
-		volatile __m128i *_addr;				\
+		volatile efsys_uint128_t *_addr;			\
 									\
 		_NOTE(CONSTANTCONDITION);				\
 		SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,	\
@@ -344,7 +345,7 @@ 
 					 uint32_t, (_eop)->eo_u32[1],	\
 					 uint32_t, (_eop)->eo_u32[0]);	\
 									\
-		_addr = (volatile __m128i *)(_base + (_offset));	\
+		_addr = (volatile efsys_uint128_t *)(_base + (_offset));\
 		_addr[0] = (_eop)->eo_u128[0];				\
 									\
 		_NOTE(CONSTANTCONDITION);				\
@@ -445,7 +446,7 @@ 
 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)			\
 	do {								\
 		volatile uint8_t *_base = (_esbp)->esb_base;		\
-		volatile __m128i *_addr;				\
+		volatile efsys_uint128_t *_addr;			\
 									\
 		_NOTE(CONSTANTCONDITION);				\
 		SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,	\
@@ -455,7 +456,7 @@ 
 		if (_lock)						\
 			SFC_BAR_LOCK(_esbp);				\
 									\
-		_addr = (volatile __m128i *)(_base + (_offset));	\
+		_addr = (volatile efsys_uint128_t *)(_base + (_offset));\
 		rte_rmb();						\
 		/* There is no rte_read128_relaxed() yet */		\
 		(_eop)->eo_u128[0] = _addr[0];				\
@@ -537,7 +538,7 @@ 
 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)			\
 	do {								\
 		volatile uint8_t *_base = (_esbp)->esb_base;		\
-		volatile __m128i *_addr;				\
+		volatile efsys_uint128_t *_addr;			\
 									\
 		_NOTE(CONSTANTCONDITION);				\
 		SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,	\
@@ -553,7 +554,7 @@ 
 					 uint32_t, (_eop)->eo_u32[1],	\
 					 uint32_t, (_eop)->eo_u32[0]);	\
 									\
-		_addr = (volatile __m128i *)(_base + (_offset));	\
+		_addr = (volatile efsys_uint128_t *)(_base + (_offset));\
 		/* There is no rte_write128_relaxed() yet */		\
 		_addr[0] = (_eop)->eo_u128[0];				\
 		rte_wmb();						\