[v10,14/18] member: check max SIMD bitwidth

Message ID 20201019134858.32507-15-david.marchand@redhat.com (mailing list archive)
State Accepted, archived
Delegated to: David Marchand
Headers
Series add max SIMD bitwidth to EAL |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

David Marchand Oct. 19, 2020, 1:48 p.m. UTC
  From: Ciara Power <ciara.power@intel.com>

When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU
enabled path.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
---
v4: Updated enum name.
---
 lib/librte_member/rte_member_ht.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
  

Patch

diff --git a/lib/librte_member/rte_member_ht.c b/lib/librte_member/rte_member_ht.c
index 3ea293a094..a85561b472 100644
--- a/lib/librte_member/rte_member_ht.c
+++ b/lib/librte_member/rte_member_ht.c
@@ -7,6 +7,7 @@ 
 #include <rte_prefetch.h>
 #include <rte_random.h>
 #include <rte_log.h>
+#include <rte_vect.h>
 
 #include "rte_member.h"
 #include "rte_member_ht.h"
@@ -113,7 +114,8 @@  rte_member_create_ht(struct rte_member_setsum *ss,
 	}
 #if defined(RTE_ARCH_X86)
 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
-			RTE_MEMBER_BUCKET_ENTRIES == 16)
+			RTE_MEMBER_BUCKET_ENTRIES == 16 &&
+			rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
 		ss->sig_cmp_fn = RTE_MEMBER_COMPARE_AVX2;
 	else
 #endif