[v10,06/18] net/enic: check max SIMD bitwidth

Message ID 20201019134858.32507-7-david.marchand@redhat.com (mailing list archive)
State Accepted, archived
Delegated to: David Marchand
Headers
Series add max SIMD bitwidth to EAL |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

David Marchand Oct. 19, 2020, 1:48 p.m. UTC
  From: Ciara Power <ciara.power@intel.com>

When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
---
v4: Updated enum name.
---
 drivers/net/enic/enic_rxtx_vec_avx2.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
  

Patch

diff --git a/drivers/net/enic/enic_rxtx_vec_avx2.c b/drivers/net/enic/enic_rxtx_vec_avx2.c
index 676b9f5fdb..d39021f30c 100644
--- a/drivers/net/enic/enic_rxtx_vec_avx2.c
+++ b/drivers/net/enic/enic_rxtx_vec_avx2.c
@@ -5,6 +5,7 @@ 
 
 #include <rte_mbuf.h>
 #include <rte_ethdev_driver.h>
+#include <rte_vect.h>
 
 #include "enic_compat.h"
 #include "rq_enet_desc.h"
@@ -821,7 +822,8 @@  enic_use_vector_rx_handler(struct rte_eth_dev *eth_dev)
 	fconf = &eth_dev->data->dev_conf.fdir_conf;
 	if (fconf->mode != RTE_FDIR_MODE_NONE)
 		return false;
-	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) {
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
+			rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256) {
 		ENICPMD_LOG(DEBUG, " use the non-scatter avx2 Rx handler");
 		eth_dev->rx_pkt_burst = &enic_noscatter_vec_recv_pkts;
 		enic->use_noscatter_vec_rx_handler = 1;