[v9,14/18] member: add checks for max SIMD bitwidth
diff mbox series

Message ID 20201016142742.87297-15-ciara.power@intel.com
State Superseded
Delegated to: David Marchand
Headers show
Series
  • add max SIMD bitwidth to EAL
Related show

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Ciara Power Oct. 16, 2020, 2:27 p.m. UTC
When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU
enabled path.

Cc: Yipeng Wang <yipeng1.wang@intel.com>
Cc: Sameh Gobriel <sameh.gobriel@intel.com>

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>

---
v4: Updated enum name.
---
 lib/librte_member/rte_member_ht.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/lib/librte_member/rte_member_ht.c b/lib/librte_member/rte_member_ht.c
index 3ea293a094..98c8aac248 100644
--- a/lib/librte_member/rte_member_ht.c
+++ b/lib/librte_member/rte_member_ht.c
@@ -113,7 +113,8 @@  rte_member_create_ht(struct rte_member_setsum *ss,
 	}
 #if defined(RTE_ARCH_X86)
 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
-			RTE_MEMBER_BUCKET_ENTRIES == 16)
+			RTE_MEMBER_BUCKET_ENTRIES == 16 &&
+			rte_get_max_simd_bitwidth() >= RTE_SIMD_256)
 		ss->sig_cmp_fn = RTE_MEMBER_COMPARE_AVX2;
 	else
 #endif