[v3,43/60] common/sfc_efx/base: add function control window concept
diff mbox series

Message ID 1600949555-28043-44-git-send-email-arybchenko@solarflare.com
State Accepted
Delegated to: Ferruh Yigit
Headers show
Series
  • common/sfc_efx: support Riverhead NIC family
Related show

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Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Andrew Rybchenko Sept. 24, 2020, 12:12 p.m. UTC
From: Igor Romanov <igor.romanov@oktetlabs.ru>

Function control window can be located at a different offset than
other windows on Riverhead. Meaning that the drivers must handle
accesses to the function control window differently in case of EF100.

Add accessor macros for function control window and change
EFX NIC create API to facilitate that accessors.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
---
 drivers/common/sfc_efx/base/ef10_mcdi.c | 21 ++++++++-----
 drivers/common/sfc_efx/base/efx.h       |  1 +
 drivers/common/sfc_efx/base/efx_impl.h  | 39 +++++++++++++++++++++++++
 drivers/common/sfc_efx/base/efx_nic.c   |  9 ++++++
 drivers/common/sfc_efx/base/rhead_ev.c  |  2 +-
 drivers/common/sfc_efx/base/rhead_nic.c |  2 +-
 drivers/net/sfc/sfc.c                   |  3 +-
 7 files changed, 67 insertions(+), 10 deletions(-)

Patch
diff mbox series

diff --git a/drivers/common/sfc_efx/base/ef10_mcdi.c b/drivers/common/sfc_efx/base/ef10_mcdi.c
index 727f14826e..b324ec825b 100644
--- a/drivers/common/sfc_efx/base/ef10_mcdi.c
+++ b/drivers/common/sfc_efx/base/ef10_mcdi.c
@@ -56,7 +56,7 @@  ef10_mcdi_init(
 	switch (enp->en_family) {
 #if EFSYS_OPT_RIVERHEAD
 	case EFX_FAMILY_RIVERHEAD:
-		EFX_BAR_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword, B_FALSE);
+		EFX_BAR_FCW_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword);
 		break;
 #endif	/* EFSYS_OPT_RIVERHEAD */
 	default:
@@ -166,7 +166,7 @@  ef10_mcdi_send_request(
 	switch (enp->en_family) {
 #if EFSYS_OPT_RIVERHEAD
 	case EFX_FAMILY_RIVERHEAD:
-		EFX_BAR_WRITED(enp, ER_GZ_MC_DB_LWRD_REG, &dword, B_FALSE);
+		EFX_BAR_FCW_WRITED(enp, ER_GZ_MC_DB_LWRD_REG, &dword);
 		break;
 #endif	/* EFSYS_OPT_RIVERHEAD */
 	default:
@@ -179,7 +179,7 @@  ef10_mcdi_send_request(
 	switch (enp->en_family) {
 #if EFSYS_OPT_RIVERHEAD
 	case EFX_FAMILY_RIVERHEAD:
-		EFX_BAR_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword, B_FALSE);
+		EFX_BAR_FCW_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword);
 		break;
 #endif	/* EFSYS_OPT_RIVERHEAD */
 	default:
@@ -237,11 +237,18 @@  ef10_mcdi_poll_reboot(
 
 	old_status = emip->emi_mc_reboot_status;
 
-	EFX_STATIC_ASSERT(ER_DZ_BIU_MC_SFT_STATUS_REG_OFST ==
-	    ER_GZ_MC_SFT_STATUS_OFST);
-
 	/* Update MC reboot status word */
-	EFX_BAR_TBL_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG, 0, &dword, B_FALSE);
+	switch (enp->en_family) {
+#if EFSYS_OPT_RIVERHEAD
+	case EFX_FAMILY_RIVERHEAD:
+		EFX_BAR_FCW_READD(enp, ER_GZ_MC_SFT_STATUS, &dword);
+		break;
+#endif	/* EFSYS_OPT_RIVERHEAD */
+	default:
+		EFX_BAR_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG,
+			      &dword, B_FALSE);
+		break;
+	}
 	new_status = dword.ed_u32[0];
 
 	/* MC has rebooted if the value has changed */
diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h
index 41222a71f1..1531b7f57f 100644
--- a/drivers/common/sfc_efx/base/efx.h
+++ b/drivers/common/sfc_efx/base/efx.h
@@ -150,6 +150,7 @@  efx_nic_create(
 	__in		efx_family_t family,
 	__in		efsys_identifier_t *esip,
 	__in		efsys_bar_t *esbp,
+	__in		uint32_t fcw_offset,
 	__in		efsys_lock_t *eslp,
 	__deref_out	efx_nic_t **enpp);
 
diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h
index fc0a654f80..b1457f361a 100644
--- a/drivers/common/sfc_efx/base/efx_impl.h
+++ b/drivers/common/sfc_efx/base/efx_impl.h
@@ -846,6 +846,7 @@  struct efx_nic_s {
 			int			ena_vi_base;
 			int			ena_vi_count;
 			int			ena_vi_shift;
+			uint32_t		ena_fcw_base;
 #if EFSYS_OPT_VPD
 			caddr_t			ena_svpd;
 			size_t			ena_svpd_length;
@@ -1114,6 +1115,9 @@  struct efx_txq_s {
  * Code used on EF10 *must* use EFX_BAR_VI_*() macros for per-VI registers,
  * to ensure the correct runtime VI window size is used on Medford2.
  *
+ * Code used on EF100 *must* use EFX_BAR_FCW_* macros for function control
+ * window registers, to ensure the correct starting offset is used.
+ *
  * Siena-only code may continue using EFX_BAR_TBL_*() macros for VI registers.
  */
 
@@ -1218,6 +1222,41 @@  struct efx_txq_s {
 	_NOTE(CONSTANTCONDITION)					\
 	} while (B_FALSE)
 
+/*
+ * Accessors for memory BAR function control window registers.
+ *
+ * The function control window is located at an offset which can be
+ * non-zero in case of Riverhead.
+ */
+
+#if EFSYS_OPT_RIVERHEAD
+
+#define	EFX_BAR_FCW_READD(_enp, _reg, _edp)				\
+	do {								\
+		EFX_CHECK_REG((_enp), (_reg));				\
+		EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST +	\
+		    (_enp)->en_arch.ef10.ena_fcw_base,			\
+		    (_edp), B_FALSE);					\
+		EFSYS_PROBE3(efx_bar_fcw_readd, const char *, #_reg,	\
+		    uint32_t, _reg ## _OFST,				\
+		    uint32_t, (_edp)->ed_u32[0]);			\
+	_NOTE(CONSTANTCONDITION)					\
+	} while (B_FALSE)
+
+#define	EFX_BAR_FCW_WRITED(_enp, _reg, _edp)				\
+	do {								\
+		EFX_CHECK_REG((_enp), (_reg));				\
+		EFSYS_PROBE3(efx_bar_fcw_writed, const char *, #_reg,	\
+		    uint32_t, _reg ## _OFST,				\
+		    uint32_t, (_edp)->ed_u32[0]);			\
+		EFSYS_BAR_WRITED((_enp)->en_esbp, _reg ## _OFST +	\
+		    (_enp)->en_arch.ef10.ena_fcw_base,			\
+		    (_edp), B_FALSE);					\
+	_NOTE(CONSTANTCONDITION)					\
+	} while (B_FALSE)
+
+#endif	/* EFSYS_OPT_RIVERHEAD */
+
 /*
  * Accessors for memory BAR per-VI registers.
  *
diff --git a/drivers/common/sfc_efx/base/efx_nic.c b/drivers/common/sfc_efx/base/efx_nic.c
index 465e2c7a36..3dc287a095 100644
--- a/drivers/common/sfc_efx/base/efx_nic.c
+++ b/drivers/common/sfc_efx/base/efx_nic.c
@@ -215,6 +215,7 @@  efx_nic_create(
 	__in		efx_family_t family,
 	__in		efsys_identifier_t *esip,
 	__in		efsys_bar_t *esbp,
+	__in		uint32_t fcw_offset,
 	__in		efsys_lock_t *eslp,
 	__deref_out	efx_nic_t **enpp)
 {
@@ -316,6 +317,7 @@  efx_nic_create(
 		    EFX_FEATURE_MCDI |
 		    EFX_FEATURE_MAC_HEADER_FILTERS |
 		    EFX_FEATURE_MCDI_DMA;
+		enp->en_arch.ef10.ena_fcw_base = fcw_offset;
 		break;
 #endif	/* EFSYS_OPT_RIVERHEAD */
 
@@ -324,6 +326,11 @@  efx_nic_create(
 		goto fail2;
 	}
 
+	if ((family != EFX_FAMILY_RIVERHEAD) && (fcw_offset != 0)) {
+		rc = EINVAL;
+		goto fail3;
+	}
+
 	enp->en_family = family;
 	enp->en_esip = esip;
 	enp->en_esbp = esbp;
@@ -333,6 +340,8 @@  efx_nic_create(
 
 	return (0);
 
+fail3:
+	EFSYS_PROBE(fail3);
 fail2:
 	EFSYS_PROBE(fail2);
 
diff --git a/drivers/common/sfc_efx/base/rhead_ev.c b/drivers/common/sfc_efx/base/rhead_ev.c
index 380729d174..8392a2be5b 100644
--- a/drivers/common/sfc_efx/base/rhead_ev.c
+++ b/drivers/common/sfc_efx/base/rhead_ev.c
@@ -133,7 +133,7 @@  rhead_ev_qprime(
 	EFX_POPULATE_DWORD_2(dword, ERF_GZ_EVQ_ID, eep->ee_index,
 	    ERF_GZ_IDX, rptr);
 	/* EVQ_INT_PRIME lives function control window only on Riverhead */
-	EFX_BAR_WRITED(enp, ER_GZ_EVQ_INT_PRIME, &dword, B_FALSE);
+	EFX_BAR_FCW_WRITED(enp, ER_GZ_EVQ_INT_PRIME, &dword);
 
 	return (0);
 }
diff --git a/drivers/common/sfc_efx/base/rhead_nic.c b/drivers/common/sfc_efx/base/rhead_nic.c
index 7fb28eae31..a773a43bcc 100644
--- a/drivers/common/sfc_efx/base/rhead_nic.c
+++ b/drivers/common/sfc_efx/base/rhead_nic.c
@@ -456,7 +456,7 @@  rhead_nic_hw_unavailable(
 	if (enp->en_reset_flags & EFX_RESET_HW_UNAVAIL)
 		return (B_TRUE);
 
-	EFX_BAR_READD(enp, ER_GZ_MC_SFT_STATUS, &dword, B_FALSE);
+	EFX_BAR_FCW_READD(enp, ER_GZ_MC_SFT_STATUS, &dword);
 	if (EFX_DWORD_FIELD(dword, EFX_DWORD_0) == 0xffffffff)
 		goto unavail;
 
diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c
index 03ea5dc128..4be65c15dc 100644
--- a/drivers/net/sfc/sfc.c
+++ b/drivers/net/sfc/sfc.c
@@ -1046,7 +1046,8 @@  sfc_probe(struct sfc_adapter *sa)
 	sfc_log_init(sa, "create nic");
 	rte_spinlock_init(&sa->nic_lock);
 	rc = efx_nic_create(sa->family, (efsys_identifier_t *)sa,
-			    &sa->mem_bar, &sa->nic_lock, &enp);
+			    &sa->mem_bar, 0,
+			    &sa->nic_lock, &enp);
 	if (rc != 0)
 		goto fail_nic_create;
 	sa->nic = enp;