[v8,3/3] net/octeontx2: add rss hash level support
diff mbox series

Message ID 20200917020735.2195069-3-kirankumark@marvell.com
State Accepted
Delegated to: Ferruh Yigit
Headers show
Series
  • [v8,1/3] ethdev: add level support for RSS offload types
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Context Check Description
ci/travis-robot success Travis build: passed
ci/iol-testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Kiran Kumar Kokkilagadda Sept. 17, 2020, 2:07 a.m. UTC
From: Kiran Kumar K <kirankumark@marvell.com>

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
 drivers/net/octeontx2/otx2_ethdev.h |  2 +-
 drivers/net/octeontx2/otx2_rss.c    | 13 +++++++++++--
 2 files changed, 12 insertions(+), 3 deletions(-)

Patch
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diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..a11411239 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,7 @@ 
 #define NIX_RSS_OFFLOAD		(ETH_RSS_PORT | ETH_RSS_IP | ETH_RSS_UDP |\
 				 ETH_RSS_TCP | ETH_RSS_SCTP | \
 				 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-				 NIX_RSS_L3_L4_SRC_DST)
+				 NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_MASK)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
 	DEV_TX_OFFLOAD_MBUF_FAST_FREE	| \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..03f7bc7ea 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@  otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 			 struct rte_eth_rss_conf *rss_conf)
 {
 	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+	uint8_t rss_hash_level;
 	uint32_t flowkey_cfg;
 	uint8_t alg_idx;
 	int rc;
@@ -339,7 +340,11 @@  otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 		otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 				     (uint32_t)rss_conf->rss_key_len);
 
-	flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+	rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+	if (rss_hash_level)
+		rss_hash_level -= 1;
+	flowkey_cfg =
+		otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);
 
 	rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 			     NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +380,7 @@  otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
 	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
 	uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+	uint8_t rss_hash_level;
 	uint32_t flowkey_cfg;
 	uint64_t rss_hf;
 	uint8_t alg_idx;
@@ -399,7 +405,10 @@  otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 	}
 
 	rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-	flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+	rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+	if (rss_hash_level)
+		rss_hash_level -= 1;
+	flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);
 
 	rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 			     NIX_DEFAULT_RSS_CTX_GROUP,