From patchwork Sun Sep 13 15:49:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bing Zhao X-Patchwork-Id: 77547 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A4A65A04C9; Sun, 13 Sep 2020 17:50:08 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6F5581C0D9; Sun, 13 Sep 2020 17:50:01 +0200 (CEST) Received: from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130]) by dpdk.org (Postfix) with ESMTP id 01D931C08C for ; Sun, 13 Sep 2020 17:50:00 +0200 (CEST) From: Bing Zhao To: thomas@monjalon.net, orika@nvidia.com, ferruh.yigit@intel.com, arybchenko@solarflare.com Cc: dev@dpdk.org Date: Sun, 13 Sep 2020 23:49:00 +0800 Message-Id: <1600012140-70151-5-git-send-email-bingz@nvidia.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1600012140-70151-1-git-send-email-bingz@nvidia.com> References: <1600012140-70151-1-git-send-email-bingz@nvidia.com> Subject: [dpdk-dev] [RFC PATCH v2 4/4] ethdev: add new attributes to hairpin queues config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" To support two ports hairpin mode and keep the backward compatibility for application, two new attribute members of hairpin queue config structure are added. `tx_explicit` means if PMD or application itself will insert the TX part flow rules. `manual_bind` means if the hairpin TX queue and peer RX queue will be bound automatically during device start stage. Different TX and RX queue pairs could have different values, but it is highly recommend that all paired queues between one egress and its peer ingress ports have the same values, in order not to bring any chaos to the system. The actual support of these attribute parameters will be checked and decided by the PMD driver. In a single port hairpin, if both are zero without any setting, the behavior will remain the same as before. It means no bind API needs to be called and no TX flow rules need to be inserted manually by the application. Signed-off-by: Bing Zhao --- lib/librte_ethdev/rte_ethdev.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index fb217b4..9560d60 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -996,6 +996,21 @@ struct rte_eth_hairpin_cap { #define RTE_ETH_MAX_HAIRPIN_PEERS 32 +/* + * Hairpin queue attribute parameters. + * Each TX queue and peer RX queue should have the same value. + * Default value 0 is for backward-compatibility, the same behaviors should + * remain if the value is not set (0). + */ +/**< Hairpin queues will be bound automatically */ +#define RTE_ETH_HAIRPIN_BIND_AUTO (0) +/**< Hairpin queues will be bound manually with bind API */ +#define RTE_ETH_HAIRPIN_BIND_MANUAL (1) +/**< Hairpin TX part flow rule will be inserted implicitly by PMD */ +#define RTE_ETH_HAIRPIN_TXRULE_IMPLICIT (0) +/**< Hairpin TX part flow rule will be inserted explicitly by APP */ +#define RTE_ETH_HAIRPIN_TXRULE_EXPLICIT (1) + /** * @warning * @b EXPERIMENTAL: this API may change, or be removed, without prior notice @@ -1016,6 +1031,8 @@ struct rte_eth_hairpin_peer { struct rte_eth_hairpin_conf { uint16_t peer_count; /**< The number of peers. */ struct rte_eth_hairpin_peer peers[RTE_ETH_MAX_HAIRPIN_PEERS]; + uint16_t tx_explicit; /**< Explicit TX flow rule by APP. */ + uint16_t manual_bind; /**< Manually binding hairpin queues. */ }; /**