From patchwork Thu Sep 3 17:07:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 76465 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B9C5A04BF; Thu, 3 Sep 2020 19:07:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CB96D1C0AE; Thu, 3 Sep 2020 19:07:42 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id 86BBE1C0AE for ; Thu, 3 Sep 2020 19:07:41 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5F1F3200215; Thu, 3 Sep 2020 19:07:41 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B9C212002CA; Thu, 3 Sep 2020 19:07:39 +0200 (CEST) Received: from lsv03273.swis.in-blr01.nxp.com (lsv03273.swis.in-blr01.nxp.com [92.120.147.113]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id A67AE402F2; Thu, 3 Sep 2020 19:07:36 +0200 (CEST) From: akhil.goyal@nxp.com To: dev@dpdk.org Cc: hemant.agrawal@nxp.com, Akhil Goyal Date: Thu, 3 Sep 2020 22:37:34 +0530 Message-Id: <20200903170734.12066-2-akhil.goyal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200903170734.12066-1-akhil.goyal@nxp.com> References: <20200903170734.12066-1-akhil.goyal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 2/2] crypto/dpaa2_sec: change descriptor sharing for ERA10 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Akhil Goyal In case of LX2160 or SEC ERA 10, share wait has performance optimizations wrt to ok-to-share signal which allows multiple DECOs to work together even in case of single queue and single SA. Hence updated the descriptor sharing only in case of ERA10. Signed-off-by: Akhil Goyal Acked-by: Hemant Agrawal --- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c index 27c28804f..2ed3c9bc4 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c @@ -2963,7 +2963,8 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev, } bufsize = cnstr_shdsc_ipsec_new_encap(priv->flc_desc[0].desc, - 1, 0, SHR_SERIAL, &encap_pdb, + 1, 0, (rta_sec_era >= RTA_SEC_ERA_10) ? + SHR_WAIT : SHR_SERIAL, &encap_pdb, hdr, &cipherdata, &authdata); } else if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS) { @@ -3028,7 +3029,8 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev, } session->dir = DIR_DEC; bufsize = cnstr_shdsc_ipsec_new_decap(priv->flc_desc[0].desc, - 1, 0, SHR_SERIAL, + 1, 0, (rta_sec_era >= RTA_SEC_ERA_10) ? + SHR_WAIT : SHR_SERIAL, &decap_pdb, &cipherdata, &authdata); } else goto out;