[1/2] crypto/dpaa2_sec: support DES-CBC
diff mbox series

Message ID 20200903163308.4759-1-akhil.goyal@nxp.com
State Accepted
Delegated to: akhil goyal
Headers show
Series
  • [1/2] crypto/dpaa2_sec: support DES-CBC
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Context Check Description
ci/checkpatch success coding style OK

Commit Message

Akhil Goyal Sept. 3, 2020, 4:33 p.m. UTC
From: Akhil Goyal <akhil.goyal@nxp.com>

add DES-CBC support for cipher_only, chain and ipsec protocol.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 doc/guides/cryptodevs/features/dpaa2_sec.ini |  3 ++-
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c  | 26 ++++++++++++++------
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h    | 22 ++++++++++++++++-
 3 files changed, 42 insertions(+), 9 deletions(-)

Comments

Akhil Goyal Oct. 9, 2020, 7:23 p.m. UTC | #1
> From: Akhil Goyal <akhil.goyal@nxp.com>
> 
> add DES-CBC support for cipher_only, chain and ipsec protocol.
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> ---
Added release notes while applying the series.

Applied to dpdk-next-crypto.

Patch
diff mbox series

diff --git a/doc/guides/cryptodevs/features/dpaa2_sec.ini b/doc/guides/cryptodevs/features/dpaa2_sec.ini
index 3a88828b8..c31321d5d 100644
--- a/doc/guides/cryptodevs/features/dpaa2_sec.ini
+++ b/doc/guides/cryptodevs/features/dpaa2_sec.ini
@@ -24,6 +24,7 @@  AES CBC (256) = Y
 AES CTR (128) = Y
 AES CTR (192) = Y
 AES CTR (256) = Y
+DES CBC       = Y
 3DES CBC      = Y
 SNOW3G UEA2   = Y
 ZUC EEA3      = Y
@@ -52,4 +53,4 @@  AES GCM (256) = Y
 ;
 ; Supported Asymmetric algorithms of the 'dpaa2_sec' crypto driver.
 ;
-[Asymmetric]
\ No newline at end of file
+[Asymmetric]
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 6aa2a36f3..69040ec6c 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1879,19 +1879,19 @@  dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 						session->iv.length,
 						session->dir);
 		break;
-	case RTE_CRYPTO_CIPHER_AES_CTR:
-		cipherdata.algtype = OP_ALG_ALGSEL_AES;
-		cipherdata.algmode = OP_ALG_AAI_CTR;
-		session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
+	case RTE_CRYPTO_CIPHER_DES_CBC:
+		cipherdata.algtype = OP_ALG_ALGSEL_DES;
+		cipherdata.algmode = OP_ALG_AAI_CBC;
+		session->cipher_alg = RTE_CRYPTO_CIPHER_DES_CBC;
 		bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
 						SHR_NEVER, &cipherdata,
 						session->iv.length,
 						session->dir);
 		break;
-	case RTE_CRYPTO_CIPHER_3DES_CTR:
-		cipherdata.algtype = OP_ALG_ALGSEL_3DES;
+	case RTE_CRYPTO_CIPHER_AES_CTR:
+		cipherdata.algtype = OP_ALG_ALGSEL_AES;
 		cipherdata.algmode = OP_ALG_AAI_CTR;
-		session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CTR;
+		session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
 		bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
 						SHR_NEVER, &cipherdata,
 						session->iv.length,
@@ -1915,6 +1915,7 @@  dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_CIPHER_AES_F8:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
+	case RTE_CRYPTO_CIPHER_3DES_CTR:
 	case RTE_CRYPTO_CIPHER_AES_XTS:
 	case RTE_CRYPTO_CIPHER_ARC4:
 	case RTE_CRYPTO_CIPHER_NULL:
@@ -2392,6 +2393,11 @@  dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
 		cipherdata.algmode = OP_ALG_AAI_CBC;
 		session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
 		break;
+	case RTE_CRYPTO_CIPHER_DES_CBC:
+		cipherdata.algtype = OP_ALG_ALGSEL_DES;
+		cipherdata.algmode = OP_ALG_AAI_CBC;
+		session->cipher_alg = RTE_CRYPTO_CIPHER_DES_CBC;
+		break;
 	case RTE_CRYPTO_CIPHER_AES_CTR:
 		cipherdata.algtype = OP_ALG_ALGSEL_AES;
 		cipherdata.algmode = OP_ALG_AAI_CTR;
@@ -2401,6 +2407,7 @@  dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 	case RTE_CRYPTO_CIPHER_NULL:
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
+	case RTE_CRYPTO_CIPHER_3DES_CTR:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_KASUMI_F8:
 		DPAA2_SEC_ERR("Crypto: Unsupported Cipher alg %u",
@@ -2732,6 +2739,10 @@  dpaa2_sec_ipsec_proto_init(struct rte_crypto_cipher_xform *cipher_xform,
 		cipherdata->algtype = OP_PCL_IPSEC_3DES;
 		cipherdata->algmode = OP_ALG_AAI_CBC;
 		break;
+	case RTE_CRYPTO_CIPHER_DES_CBC:
+		cipherdata->algtype = OP_PCL_IPSEC_DES;
+		cipherdata->algmode = OP_ALG_AAI_CBC;
+		break;
 	case RTE_CRYPTO_CIPHER_AES_CTR:
 		cipherdata->algtype = OP_PCL_IPSEC_AES_CTR;
 		cipherdata->algmode = OP_ALG_AAI_CTR;
@@ -2742,6 +2753,7 @@  dpaa2_sec_ipsec_proto_init(struct rte_crypto_cipher_xform *cipher_xform,
 	case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 	case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
+	case RTE_CRYPTO_CIPHER_3DES_CTR:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_KASUMI_F8:
 		DPAA2_SEC_ERR("Crypto: Unsupported Cipher alg %u",
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index 528b64ef8..c1f95f280 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -1,7 +1,7 @@ 
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016 NXP
+ *   Copyright 2016,2020 NXP
  *
  */
 
@@ -437,6 +437,26 @@  static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* DES CBC */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_DES_CBC,
+				.block_size = 8,
+				.key_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	{	/* 3DES CBC */
 		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 		{.sym = {