[v1,12/18] net/mlx5: separate Rx indirection table object creation

Message ID 1599128029-2092-13-git-send-email-michaelba@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series mlx5 Rx DevX/Verbs separation |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Michael Baum Sept. 3, 2020, 10:13 a.m. UTC
  Separate Rx indirection table object creation into both Verbs and DevX
modules.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_verbs.c |  79 ++++++++++++++++++++++
 drivers/net/mlx5/mlx5.h             |  23 +++++++
 drivers/net/mlx5/mlx5_devx.c        |  89 ++++++++++++++++++++++++
 drivers/net/mlx5/mlx5_flow_verbs.c  |   8 +--
 drivers/net/mlx5/mlx5_rxq.c         | 131 ++----------------------------------
 drivers/net/mlx5/mlx5_rxtx.h        |  19 ------
 6 files changed, 201 insertions(+), 148 deletions(-)
  

Comments

Ferruh Yigit Sept. 9, 2020, 11:29 a.m. UTC | #1
On 9/3/2020 11:13 AM, Michael Baum wrote:
> Separate Rx indirection table object creation into both Verbs and DevX
> modules.
> 
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>

<...>

> +	if (!ind_tbl->ind_table) {
> +		rte_errno = errno;
> +		goto error;
> +	}
> +	rte_atomic32_inc(&ind_tbl->refcnt);
>

We are switching to c11 atomics, there is a checkpatch warning to higlight this
[1], can you please update the rte_atomics... usage to __atomic_... usage?
There are multiole usages in other patches too.


[1]
http://mails.dpdk.org/archives/test-report/2020-September/150684.html
  
Matan Azrad Sept. 9, 2020, 2:37 p.m. UTC | #2
Hi Ferruh

From: Ferruh Yigit
> On 9/3/2020 11:13 AM, Michael Baum wrote:
> > Separate Rx indirection table object creation into both Verbs and DevX
> > modules.
> >
> > Signed-off-by: Michael Baum <michaelba@nvidia.com>
> > Acked-by: Matan Azrad <matan@nvidia.com>
> 
> <...>
> 
> > +     if (!ind_tbl->ind_table) {
> > +             rte_errno = errno;
> > +             goto error;
> > +     }
> > +     rte_atomic32_inc(&ind_tbl->refcnt);
> >
> 
> We are switching to c11 atomics, there is a checkpatch warning to higlight this
> [1], can you please update the rte_atomics... usage to __atomic_... usage?
> There are multiole usages in other patches too.
> 

Yes, we saw the warning.
This code didn't add new atomic, just move code from one location to another.
We have a plan to move all atomics to c11 atomics later in this release, different task.

> [1]
> https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fmails.
> dpdk.org%2Farchives%2Ftest-report%2F2020-
> September%2F150684.html&amp;data=02%7C01%7Cmatan%40nvidia.com%
> 7C055398d1a2cd4f8f0a0f08d854b3a1c8%7C43083d15727340c1b7db39efd9ccc
> 17a%7C0%7C0%7C637352477778797672&amp;sdata=cqTSn5DQ1AipzbjymFW
> ZToYDRd%2FjQQHBHWJADXPF7yo%3D&amp;reserved=0
  
Ferruh Yigit Sept. 9, 2020, 4:28 p.m. UTC | #3
On 9/9/2020 3:37 PM, Matan Azrad wrote:
> 
> Hi Ferruh
> 
> From: Ferruh Yigit
>> On 9/3/2020 11:13 AM, Michael Baum wrote:
>>> Separate Rx indirection table object creation into both Verbs and DevX
>>> modules.
>>>
>>> Signed-off-by: Michael Baum <michaelba@nvidia.com>
>>> Acked-by: Matan Azrad <matan@nvidia.com>
>>
>> <...>
>>
>>> +     if (!ind_tbl->ind_table) {
>>> +             rte_errno = errno;
>>> +             goto error;
>>> +     }
>>> +     rte_atomic32_inc(&ind_tbl->refcnt);
>>>
>>
>> We are switching to c11 atomics, there is a checkpatch warning to higlight this
>> [1], can you please update the rte_atomics... usage to __atomic_... usage?
>> There are multiole usages in other patches too.
>>
> 
> Yes, we saw the warning.
> This code didn't add new atomic, just move code from one location to another.
> We have a plan to move all atomics to c11 atomics later in this release, different task.

I see, OK then.

> 
>> [1]
>> https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fmails.
>> dpdk.org%2Farchives%2Ftest-report%2F2020-
>> September%2F150684.html&amp;data=02%7C01%7Cmatan%40nvidia.com%
>> 7C055398d1a2cd4f8f0a0f08d854b3a1c8%7C43083d15727340c1b7db39efd9ccc
>> 17a%7C0%7C0%7C637352477778797672&amp;sdata=cqTSn5DQ1AipzbjymFW
>> ZToYDRd%2FjQQHBHWJADXPF7yo%3D&amp;reserved=0
  

Patch

diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c
index 5eb556e..d36d915 100644
--- a/drivers/net/mlx5/linux/mlx5_verbs.c
+++ b/drivers/net/mlx5/linux/mlx5_verbs.c
@@ -440,10 +440,89 @@ 
 	return -rte_errno;
 }
 
+/**
+ * Create an indirection table.
+ *
+ * @param dev
+ *   Pointer to Ethernet device.
+ * @param queues
+ *   Queues entering in the indirection table.
+ * @param queues_n
+ *   Number of queues in the array.
+ *
+ * @return
+ *   The Verbs object initialized, NULL otherwise and rte_errno is set.
+ */
+static struct mlx5_ind_table_obj *
+mlx5_ibv_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
+			   uint32_t queues_n)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+	struct mlx5_ind_table_obj *ind_tbl;
+	const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
+				  log2above(queues_n) :
+				  log2above(priv->config.ind_table_max_size);
+	struct ibv_wq *wq[1 << wq_n];
+	unsigned int i = 0, j = 0, k = 0;
+
+	ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
+			      queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
+	if (!ind_tbl) {
+		rte_errno = ENOMEM;
+		return NULL;
+	}
+	ind_tbl->type = MLX5_IND_TBL_TYPE_IBV;
+	for (i = 0; i != queues_n; ++i) {
+		struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
+		if (!rxq)
+			goto error;
+		wq[i] = rxq->obj->wq;
+		ind_tbl->queues[i] = queues[i];
+	}
+	ind_tbl->queues_n = queues_n;
+	/* Finalise indirection table. */
+	k = i; /* Retain value of i for use in error case. */
+	for (j = 0; k != (unsigned int)(1 << wq_n); ++k, ++j)
+		wq[k] = wq[j];
+	ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table(priv->sh->ctx,
+					&(struct ibv_rwq_ind_table_init_attr){
+						.log_ind_tbl_size = wq_n,
+						.ind_tbl = wq,
+						.comp_mask = 0,
+					});
+	if (!ind_tbl->ind_table) {
+		rte_errno = errno;
+		goto error;
+	}
+	rte_atomic32_inc(&ind_tbl->refcnt);
+	LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
+	return ind_tbl;
+error:
+	for (j = 0; j < i; j++)
+		mlx5_rxq_release(dev, ind_tbl->queues[j]);
+	mlx5_free(ind_tbl);
+	DEBUG("Port %u cannot create indirection table.", dev->data->port_id);
+	return NULL;
+}
+
+/**
+ * Destroys the specified Indirection Table.
+ *
+ * @param ind_table
+ *   Indirection table to release.
+ */
+static void
+mlx5_ibv_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)
+{
+	claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
+}
+
 struct mlx5_obj_ops ibv_obj_ops = {
 	.rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_wq_vlan_strip,
 	.rxq_obj_new = mlx5_rxq_ibv_obj_new,
 	.rxq_event_get = mlx5_rx_ibv_get_event,
 	.rxq_obj_modify = mlx5_ibv_modify_wq,
 	.rxq_obj_release = mlx5_rxq_ibv_obj_release,
+	.ind_table_obj_new = mlx5_ibv_ind_table_obj_new,
+	.ind_table_obj_destroy = mlx5_ibv_ind_table_obj_destroy,
 };
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index a51c88f..c151e64 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -704,6 +704,25 @@  struct mlx5_rxq_obj {
 	};
 };
 
+enum mlx5_ind_tbl_type {
+	MLX5_IND_TBL_TYPE_IBV,
+	MLX5_IND_TBL_TYPE_DEVX,
+};
+
+/* Indirection table. */
+struct mlx5_ind_table_obj {
+	LIST_ENTRY(mlx5_ind_table_obj) next; /* Pointer to the next element. */
+	rte_atomic32_t refcnt; /* Reference counter. */
+	enum mlx5_ind_tbl_type type;
+	RTE_STD_C11
+	union {
+		void *ind_table; /**< Indirection table. */
+		struct mlx5_devx_obj *rqt; /* DevX RQT object. */
+	};
+	uint32_t queues_n; /**< Number of queues in the list. */
+	uint16_t queues[]; /**< Queue list. */
+};
+
 /* HW objects operations structure. */
 struct mlx5_obj_ops {
 	int (*rxq_obj_modify_vlan_strip)(struct mlx5_rxq_obj *rxq_obj, int on);
@@ -711,6 +730,10 @@  struct mlx5_obj_ops {
 	int (*rxq_event_get)(struct mlx5_rxq_obj *rxq_obj);
 	int (*rxq_obj_modify)(struct mlx5_rxq_obj *rxq_obj, bool is_start);
 	void (*rxq_obj_release)(struct mlx5_rxq_obj *rxq_obj);
+	struct mlx5_ind_table_obj *(*ind_table_obj_new)(struct rte_eth_dev *dev,
+							const uint16_t *queues,
+							uint32_t queues_n);
+	void (*ind_table_obj_destroy)(struct mlx5_ind_table_obj *ind_tbl);
 };
 
 struct mlx5_priv {
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index 07922c2..aab5e50 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -22,6 +22,7 @@ 
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
 #include "mlx5_devx.h"
+#include "mlx5_flow.h"
 
 
 /**
@@ -607,10 +608,98 @@ 
 	return -rte_errno;
 }
 
+/**
+ * Create an indirection table.
+ *
+ * @param dev
+ *   Pointer to Ethernet device.
+ * @param queues
+ *   Queues entering in the indirection table.
+ * @param queues_n
+ *   Number of queues in the array.
+ *
+ * @return
+ *   The DevX object initialized, NULL otherwise and rte_errno is set.
+ */
+static struct mlx5_ind_table_obj *
+mlx5_devx_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
+			    uint32_t queues_n)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+	struct mlx5_ind_table_obj *ind_tbl;
+	struct mlx5_devx_rqt_attr *rqt_attr = NULL;
+	const unsigned int rqt_n = 1 << (rte_is_power_of_2(queues_n) ?
+				   log2above(queues_n) :
+				   log2above(priv->config.ind_table_max_size));
+	unsigned int i = 0, j = 0, k = 0;
+
+	ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
+			      queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
+	if (!ind_tbl) {
+		rte_errno = ENOMEM;
+		return NULL;
+	}
+	ind_tbl->type = MLX5_IND_TBL_TYPE_DEVX;
+	rqt_attr = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rqt_attr) +
+			      rqt_n * sizeof(uint32_t), 0, SOCKET_ID_ANY);
+	if (!rqt_attr) {
+		DRV_LOG(ERR, "Port %u cannot allocate RQT resources.",
+			dev->data->port_id);
+		rte_errno = ENOMEM;
+		goto error;
+	}
+	rqt_attr->rqt_max_size = priv->config.ind_table_max_size;
+	rqt_attr->rqt_actual_size = rqt_n;
+	for (i = 0; i != queues_n; ++i) {
+		struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
+		if (!rxq) {
+			mlx5_free(rqt_attr);
+			goto error;
+		}
+		rqt_attr->rq_list[i] = rxq->obj->rq->id;
+		ind_tbl->queues[i] = queues[i];
+	}
+	k = i; /* Retain value of i for use in error case. */
+	for (j = 0; k != rqt_n; ++k, ++j)
+		rqt_attr->rq_list[k] = rqt_attr->rq_list[j];
+	ind_tbl->rqt = mlx5_devx_cmd_create_rqt(priv->sh->ctx, rqt_attr);
+	mlx5_free(rqt_attr);
+	if (!ind_tbl->rqt) {
+		DRV_LOG(ERR, "Port %u cannot create DevX RQT.",
+			dev->data->port_id);
+		rte_errno = errno;
+		goto error;
+	}
+	ind_tbl->queues_n = queues_n;
+	rte_atomic32_inc(&ind_tbl->refcnt);
+	LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
+	return ind_tbl;
+error:
+	for (j = 0; j < i; j++)
+		mlx5_rxq_release(dev, ind_tbl->queues[j]);
+	mlx5_free(ind_tbl);
+	DEBUG("Port %u cannot create indirection table.", dev->data->port_id);
+	return NULL;
+}
+
+/**
+ * Destroy the DevX RQT object.
+ *
+ * @param ind_table
+ *   Indirection table to release.
+ */
+static void
+mlx5_devx_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)
+{
+	claim_zero(mlx5_devx_cmd_destroy(ind_tbl->rqt));
+}
+
 struct mlx5_obj_ops devx_obj_ops = {
 	.rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_rq_vlan_strip,
 	.rxq_obj_new = mlx5_rxq_devx_obj_new,
 	.rxq_event_get = mlx5_rx_devx_get_event,
 	.rxq_obj_modify = mlx5_devx_modify_rq,
 	.rxq_obj_release = mlx5_rxq_devx_obj_release,
+	.ind_table_obj_new = mlx5_devx_ind_table_obj_new,
+	.ind_table_obj_destroy = mlx5_devx_ind_table_obj_destroy,
 };
diff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c
index 334e19b..80c549a 100644
--- a/drivers/net/mlx5/mlx5_flow_verbs.c
+++ b/drivers/net/mlx5/mlx5_flow_verbs.c
@@ -1981,10 +1981,10 @@ 
 
 			MLX5_ASSERT(rss_desc->queue_num);
 			hrxq_idx = mlx5_hrxq_get(dev, rss_desc->key,
-					     MLX5_RSS_HASH_KEY_LEN,
-					     dev_flow->hash_fields,
-					     rss_desc->queue,
-					     rss_desc->queue_num);
+						 MLX5_RSS_HASH_KEY_LEN,
+						 dev_flow->hash_fields,
+						 rss_desc->queue,
+						 rss_desc->queue_num);
 			if (!hrxq_idx)
 				hrxq_idx = mlx5_hrxq_new(dev, rss_desc->key,
 						MLX5_RSS_HASH_KEY_LEN,
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index c18610d..aa39892 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -25,7 +25,6 @@ 
 
 #include "mlx5_defs.h"
 #include "mlx5.h"
-#include "mlx5_common_os.h"
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
 #include "mlx5_autoconf.h"
@@ -1710,115 +1709,6 @@  enum mlx5_rxq_type
 }
 
 /**
- * Create an indirection table.
- *
- * @param dev
- *   Pointer to Ethernet device.
- * @param queues
- *   Queues entering in the indirection table.
- * @param queues_n
- *   Number of queues in the array.
- *
- * @return
- *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
- */
-static struct mlx5_ind_table_obj *
-mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
-		       uint32_t queues_n, enum mlx5_ind_tbl_type type)
-{
-	struct mlx5_priv *priv = dev->data->dev_private;
-	struct mlx5_ind_table_obj *ind_tbl;
-	unsigned int i = 0, j = 0, k = 0;
-
-	ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
-			      queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
-	if (!ind_tbl) {
-		rte_errno = ENOMEM;
-		return NULL;
-	}
-	ind_tbl->type = type;
-	if (ind_tbl->type == MLX5_IND_TBL_TYPE_IBV) {
-		const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
-			log2above(queues_n) :
-			log2above(priv->config.ind_table_max_size);
-		struct ibv_wq *wq[1 << wq_n];
-
-		for (i = 0; i != queues_n; ++i) {
-			struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev,
-								 queues[i]);
-			if (!rxq)
-				goto error;
-			wq[i] = rxq->obj->wq;
-			ind_tbl->queues[i] = queues[i];
-		}
-		ind_tbl->queues_n = queues_n;
-		/* Finalise indirection table. */
-		k = i; /* Retain value of i for use in error case. */
-		for (j = 0; k != (unsigned int)(1 << wq_n); ++k, ++j)
-			wq[k] = wq[j];
-		ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
-			(priv->sh->ctx,
-			 &(struct ibv_rwq_ind_table_init_attr){
-				.log_ind_tbl_size = wq_n,
-				.ind_tbl = wq,
-				.comp_mask = 0,
-			});
-		if (!ind_tbl->ind_table) {
-			rte_errno = errno;
-			goto error;
-		}
-	} else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */
-		struct mlx5_devx_rqt_attr *rqt_attr = NULL;
-		const unsigned int rqt_n =
-			1 << (rte_is_power_of_2(queues_n) ?
-			      log2above(queues_n) :
-			      log2above(priv->config.ind_table_max_size));
-
-		rqt_attr = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rqt_attr) +
-				      rqt_n * sizeof(uint32_t), 0,
-				      SOCKET_ID_ANY);
-		if (!rqt_attr) {
-			DRV_LOG(ERR, "port %u cannot allocate RQT resources",
-				dev->data->port_id);
-			rte_errno = ENOMEM;
-			goto error;
-		}
-		rqt_attr->rqt_max_size = priv->config.ind_table_max_size;
-		rqt_attr->rqt_actual_size = rqt_n;
-		for (i = 0; i != queues_n; ++i) {
-			struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev,
-								 queues[i]);
-			if (!rxq)
-				goto error;
-			rqt_attr->rq_list[i] = rxq->obj->rq->id;
-			ind_tbl->queues[i] = queues[i];
-		}
-		k = i; /* Retain value of i for use in error case. */
-		for (j = 0; k != rqt_n; ++k, ++j)
-			rqt_attr->rq_list[k] = rqt_attr->rq_list[j];
-		ind_tbl->rqt = mlx5_devx_cmd_create_rqt(priv->sh->ctx,
-							rqt_attr);
-		mlx5_free(rqt_attr);
-		if (!ind_tbl->rqt) {
-			DRV_LOG(ERR, "port %u cannot create DevX RQT",
-				dev->data->port_id);
-			rte_errno = errno;
-			goto error;
-		}
-		ind_tbl->queues_n = queues_n;
-	}
-	rte_atomic32_inc(&ind_tbl->refcnt);
-	LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
-	return ind_tbl;
-error:
-	for (j = 0; j < i; j++)
-		mlx5_rxq_release(dev, ind_tbl->queues[j]);
-	mlx5_free(ind_tbl);
-	DEBUG("port %u cannot create indirection table", dev->data->port_id);
-	return NULL;
-}
-
-/**
  * Get an indirection table.
  *
  * @param dev
@@ -1870,15 +1760,11 @@  enum mlx5_rxq_type
 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
 			   struct mlx5_ind_table_obj *ind_tbl)
 {
+	struct mlx5_priv *priv = dev->data->dev_private;
 	unsigned int i;
 
-	if (rte_atomic32_dec_and_test(&ind_tbl->refcnt)) {
-		if (ind_tbl->type == MLX5_IND_TBL_TYPE_IBV)
-			claim_zero(mlx5_glue->destroy_rwq_ind_table
-							(ind_tbl->ind_table));
-		else if (ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX)
-			claim_zero(mlx5_devx_cmd_destroy(ind_tbl->rqt));
-	}
+	if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
+		priv->obj_ops->ind_table_obj_destroy(ind_tbl);
 	for (i = 0; i != ind_tbl->queues_n; ++i)
 		claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
 	if (!rte_atomic32_read(&ind_tbl->refcnt)) {
@@ -1956,13 +1842,9 @@  enum mlx5_rxq_type
 
 	queues_n = hash_fields ? queues_n : 1;
 	ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
-	if (!ind_tbl) {
-		enum mlx5_ind_tbl_type type;
-
-		type = rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_IBV ?
-				MLX5_IND_TBL_TYPE_IBV : MLX5_IND_TBL_TYPE_DEVX;
-		ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n, type);
-	}
+	if (!ind_tbl)
+		ind_tbl = priv->obj_ops->ind_table_obj_new(dev, queues,
+							   queues_n);
 	if (!ind_tbl) {
 		rte_errno = ENOMEM;
 		return 0;
@@ -2062,7 +1944,6 @@  enum mlx5_rxq_type
 			struct mlx5_rx_hash_field_select *rx_hash_field_select =
 					&tir_attr.rx_hash_field_selector_outer;
 #endif
-
 			/* 1 bit: 0: IPv4, 1: IPv6. */
 			rx_hash_field_select->l3_prot_type =
 				!!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 75eedff..7878c81 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -186,25 +186,6 @@  struct mlx5_rxq_ctrl {
 	struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
 };
 
-enum mlx5_ind_tbl_type {
-	MLX5_IND_TBL_TYPE_IBV,
-	MLX5_IND_TBL_TYPE_DEVX,
-};
-
-/* Indirection table. */
-struct mlx5_ind_table_obj {
-	LIST_ENTRY(mlx5_ind_table_obj) next; /* Pointer to the next element. */
-	rte_atomic32_t refcnt; /* Reference counter. */
-	enum mlx5_ind_tbl_type type;
-	RTE_STD_C11
-	union {
-		void *ind_table; /**< Indirection table. */
-		struct mlx5_devx_obj *rqt; /* DevX RQT object. */
-	};
-	uint32_t queues_n; /**< Number of queues in the list. */
-	uint16_t queues[]; /**< Queue list. */
-};
-
 /* Hash Rx queue. */
 struct mlx5_hrxq {
 	ILIST_ENTRY(uint32_t)next; /* Index to the next element. */