From patchwork Thu Aug 27 16:13:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ciara Power X-Patchwork-Id: 76111 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 619F1A04B1; Thu, 27 Aug 2020 18:16:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A3DC21C138; Thu, 27 Aug 2020 18:13:58 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 5E6311C0AF for ; Thu, 27 Aug 2020 18:13:43 +0200 (CEST) IronPort-SDR: AvBr7r/X5j8p5CCnrM+WAAMDO9Svt03PqHl1HRYWb+ImPIYB8Oqr5dGjaZeTmSc+FYWSPNxjwa LflD48DXLsOg== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767055" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767055" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:38 -0700 IronPort-SDR: rO5vkWGEeSo00+zKezWSe0ApwsNceEMWyHvfy3R+jVgz4TYr6pOr108R3pfyzoq4pyic8DsHRw 73hOZuzxmmLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681608" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:37 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Yipeng Wang , Sameh Gobriel Date: Thu, 27 Aug 2020 17:13:02 +0100 Message-Id: <20200827161304.32300-16-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 15/17] member: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Yipeng Wang Cc: Sameh Gobriel Signed-off-by: Ciara Power --- lib/librte_member/rte_member_ht.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/librte_member/rte_member_ht.c b/lib/librte_member/rte_member_ht.c index cbcd0d4407..71e3cf7b52 100644 --- a/lib/librte_member/rte_member_ht.c +++ b/lib/librte_member/rte_member_ht.c @@ -113,7 +113,8 @@ rte_member_create_ht(struct rte_member_setsum *ss, } #if defined(RTE_ARCH_X86) if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && - RTE_MEMBER_BUCKET_ENTRIES == 16) + RTE_MEMBER_BUCKET_ENTRIES == 16 && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) ss->sig_cmp_fn = RTE_MEMBER_COMPARE_AVX2; else #endif