diff mbox series

[20.11,11/12] net/mlx5: add checks for max SIMD bitwidth

Message ID	20200807155859.63888-12-ciara.power@intel.com (mailing list archive)
State	Superseded, archived
Delegated to:	David Marchand
Headers	IronPort-SDR: M5AGP8viWFGnbXfsbu/jlBJsHfde/cnRKToO/mDD/PCzFOkbUq8AxlBasH4Efd2AaxnW1QGC5e 5ehXm5dr0cDQ== IronPort-SDR: xgcmzQ5aNO8/0lKiRPJ/vnapbVyyEa/enilWSQyKZk4CNdZ2rrQgktyENjIr3g9Q02grCrYHBk j5NRa+b72+eQ== From: Ciara Power <ciara.power@intel.com> To: dev@dpdk.org Cc: bruce.richardson@intel.com, Ciara Power <ciara.power@intel.com>, Matan Azrad <matan@mellanox.com>, Shahaf Shuler <shahafs@mellanox.com>, Viacheslav Ovsiienko <viacheslavo@mellanox.com> Date: Fri, 7 Aug 2020 16:58:58 +0100 Message-Id: <20200807155859.63888-12-ciara.power@intel.com> In-Reply-To: <20200807155859.63888-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH 20.11 11/12] net/mlx5: add checks for max SIMD bitwidth Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	add max SIMD bitwidth to EAL \| [20.11,00/12] add max SIMD bitwidth to EAL [20.11,01/12] eal: add max SIMD bitwidth [20.11,02/12] eal: add default SIMD bitwidth values [20.11,03/12] net/i40e: add checks for max SIMD bitwidth [20.11,04/12] net/axgbe: add checks for max SIMD bitwidth [20.11,05/12] net/bnxt: add checks for max SIMD bitwidth [20.11,06/12] net/enic: add checks for max SIMD bitwidth [20.11,07/12] net/fm10k: add checks for max SIMD bitwidth [20.11,08/12] net/iavf: add checks for max SIMD bitwidth [20.11,09/12] net/ice: add checks for max SIMD bitwidth [20.11,10/12] net/ixgbe: add checks for max SIMD bitwidth [20.11,11/12] net/mlx5: add checks for max SIMD bitwidth [20.11,12/12] net/virtio: add checks for max SIMD bitwidth

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Power, Ciara Aug. 7, 2020, 3:58 p.m. UTC

  When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.

Cc: Matan Azrad <matan@mellanox.com>
Cc: Shahaf Shuler <shahafs@mellanox.com>
Cc: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

Signed-off-by: Ciara Power <ciara.power@intel.com>
---
 drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Alexander Kozyrev Aug. 10, 2020, 5:26 p.m. UTC | #1

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Ciara Power
> Sent: Friday, August 7, 2020 11:59
> To: dev@dpdk.org
> Cc: bruce.richardson@intel.com; Ciara Power <ciara.power@intel.com>; Matan
> Azrad <matan@mellanox.com>; Shahaf Shuler <shahafs@mellanox.com>;
> Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> Subject: [dpdk-dev] [PATCH 20.11 11/12] net/mlx5: add checks for max SIMD
> bitwidth
> 
> When choosing a vector path to take, an extra condition must be satisfied to
> ensure the max SIMD bitwidth allows for the CPU enabled path.
> 
> Cc: Matan Azrad <matan@mellanox.com>
> Cc: Shahaf Shuler <shahafs@mellanox.com>
> Cc: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> 
> Signed-off-by: Ciara Power <ciara.power@intel.com>
> ---
>  drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
> index cefb45064e..f322f82029 100644
> --- a/drivers/net/mlx5/mlx5_ethdev.c
> +++ b/drivers/net/mlx5/mlx5_ethdev.c
> @@ -479,7 +479,8 @@ mlx5_select_rx_function(struct rte_eth_dev *dev)
>  	eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
> 
>  	MLX5_ASSERT(dev != NULL);
> -	if (mlx5_check_vec_rx_support(dev) > 0) {
> +	if (mlx5_check_vec_rx_support(dev) > 0 &&
> +			rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD)
> {
>  		rx_pkt_burst = mlx5_rx_burst_vec;
>  		DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
>  			dev->data->port_id);
> --
> 2.17.1

Hi Ciara, what do you think about moving this condition inside the mlx5_check_vec_rx_support() function?

diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index cefb45064e..f322f82029 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -479,7 +479,8 @@  mlx5_select_rx_function(struct rte_eth_dev *dev)
 	eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
 
 	MLX5_ASSERT(dev != NULL);
-	if (mlx5_check_vec_rx_support(dev) > 0) {
+	if (mlx5_check_vec_rx_support(dev) > 0 &&
+			rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) {
 		rx_pkt_burst = mlx5_rx_burst_vec;
 		DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
 			dev->data->port_id);