diff mbox series

[v2,1/3] examples/l3fwd: increase number of routes

Message ID 20200802181631.691-1-pbhagavatula@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: David Marchand
Headers
Series [v2,1/3] examples/l3fwd: increase number of routes |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS

Commit Message

Pavan Nikhilesh Bhagavatula Aug. 2, 2020, 6:16 p.m. UTC 
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Increase the number of routes from 8 to 16 that are statically added for
lpm and em mode as most of the SoCs support more than 8 interfaces.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 v2 Changes:
 - Fixup for EM mode.

 examples/l3fwd/l3fwd_lpm.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

--
2.17.1
diff mbox series

Patch

diff --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c
index 91eb74272..00047c706 100644
--- a/examples/l3fwd/l3fwd_lpm.c
+++ b/examples/l3fwd/l3fwd_lpm.c
@@ -52,6 +52,14 @@  static const struct ipv4_l3fwd_lpm_route ipv4_l3fwd_lpm_route_array[] = {
 	{RTE_IPV4(198, 18, 5, 0), 24, 5},
 	{RTE_IPV4(198, 18, 6, 0), 24, 6},
 	{RTE_IPV4(198, 18, 7, 0), 24, 7},
+	{RTE_IPV4(198, 18, 8, 0), 24, 8},
+	{RTE_IPV4(198, 18, 9, 0), 24, 9},
+	{RTE_IPV4(198, 18, 10, 0), 24, 10},
+	{RTE_IPV4(198, 18, 11, 0), 24, 11},
+	{RTE_IPV4(198, 18, 12, 0), 24, 12},
+	{RTE_IPV4(198, 18, 13, 0), 24, 13},
+	{RTE_IPV4(198, 18, 14, 0), 24, 14},
+	{RTE_IPV4(198, 18, 15, 0), 24, 15},
 };

 /* 2001:0200::/48 is IANA reserved range for IPv6 benchmarking (RFC5180) */
@@ -64,6 +72,14 @@  static const struct ipv6_l3fwd_lpm_route ipv6_l3fwd_lpm_route_array[] = {
 	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0}, 48, 5},
 	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0}, 48, 6},
 	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0}, 48, 7},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0}, 48, 8},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0}, 48, 9},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0}, 48, 10},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0}, 48, 11},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0}, 48, 12},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 13, 0, 0, 0, 0, 0, 0}, 48, 13},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 14, 0, 0, 0, 0, 0, 0}, 48, 14},
+	{{32, 1, 2, 0, 0, 0, 0, 0, 0, 15, 0, 0, 0, 0, 0, 0}, 48, 15},
 };

 #define IPV4_L3FWD_LPM_MAX_RULES         1024