[v1] net/ice: fix gtpu teid hash

Message ID 20200728092057.93973-1-jia.guo@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v1] net/ice: fix gtpu teid hash |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot success Travis build: passed
ci/Intel-compilation success Compilation OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS

Commit Message

Guo, Jia July 28, 2020, 9:20 a.m. UTC
  Refine gtpu teid hash rule mapping for GTPU_IP/GTPU_EH/GTPU_DWN/GTPU_UP.

Fixes: 37e444b77814 ("net/ice: support hash for GTPU protocols")

Signed-off-by: Jeff Guo <jia.guo@intel.com>
---
 drivers/net/ice/ice_hash.c | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)
  

Comments

Qi Zhang July 29, 2020, 1:13 p.m. UTC | #1
> -----Original Message-----
> From: Guo, Jia <jia.guo@intel.com>
> Sent: Tuesday, July 28, 2020 5:21 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Su, Simei <simei.su@intel.com>; Guo, Jia
> <jia.guo@intel.com>
> Subject: [dpdk-dev v1] net/ice: fix gtpu teid hash
> 
> Refine gtpu teid hash rule mapping for
> GTPU_IP/GTPU_EH/GTPU_DWN/GTPU_UP.
> 
> Fixes: 37e444b77814 ("net/ice: support hash for GTPU protocols")
> 
> Signed-off-by: Jeff Guo <jia.guo@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
  

Patch

diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c
index fdfaff7f6..60183bb38 100644
--- a/drivers/net/ice/ice_hash.c
+++ b/drivers/net/ice/ice_hash.c
@@ -479,6 +479,8 @@  struct ice_hash_match_type ice_hash_type_list[] = {
 		BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID)},
 	{ETH_RSS_PFCP,
 		BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID)},
+	{ETH_RSS_GTPU,
+		BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID)},
 	/* IPV4 */
 	{ETH_RSS_IPV4 | ETH_RSS_L3_SRC_ONLY,
 		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)},
@@ -1148,21 +1150,25 @@  ice_hash_parse_action(struct ice_pattern_match_item *pattern_match_item,
 				BIT_ULL(ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI);
 			}
 
-			/* update hash field for gtpu-ip and gtpu-eh. */
-			if (rss_type != ETH_RSS_GTPU)
-				break;
-			else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_IP)
-				hash_meta->hash_flds |=
-				BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID);
-			else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_EH)
+			/* update hash field for gtpu eh/gtpu dwn/gtpu up. */
+			if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
+				hash_meta->hash_flds &=
+				~(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID));
 				hash_meta->hash_flds |=
 				BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID);
-			else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_DWN)
+			} else if (hash_meta->pkt_hdr &
+				   ICE_FLOW_SEG_HDR_GTPU_DWN) {
+				hash_meta->hash_flds &=
+				~(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID));
 				hash_meta->hash_flds |=
 				BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID);
-			else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_UP)
+			} else if (hash_meta->pkt_hdr &
+				   ICE_FLOW_SEG_HDR_GTPU_UP) {
+				hash_meta->hash_flds &=
+				~(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID));
 				hash_meta->hash_flds |=
 				BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_UP_TEID);
+			}
 
 			break;