[v3,4/8] crypto/octeontx2: add cryptodev sec registration
diff mbox series

Message ID 20200716083931.29092-5-ktejasree@marvell.com
State Accepted
Delegated to: akhil goyal
Headers show
Series
  • add OCTEON TX2 lookaside IPsec support
Related show

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Tejasree Kondoj July 16, 2020, 8:39 a.m. UTC
This patch registers security operations with cryptodev.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 doc/guides/cryptodevs/features/octeontx2.ini  |  1 +
 drivers/crypto/octeontx2/Makefile             |  1 +
 drivers/crypto/octeontx2/meson.build          |  3 +-
 drivers/crypto/octeontx2/otx2_cryptodev.c     | 12 ++++-
 drivers/crypto/octeontx2/otx2_cryptodev_sec.c | 46 +++++++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_sec.h |  6 +++
 6 files changed, 67 insertions(+), 2 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_sec.c

Patch
diff mbox series

diff --git a/doc/guides/cryptodevs/features/octeontx2.ini b/doc/guides/cryptodevs/features/octeontx2.ini
index e865466b8c..c7e418d826 100644
--- a/doc/guides/cryptodevs/features/octeontx2.ini
+++ b/doc/guides/cryptodevs/features/octeontx2.ini
@@ -8,6 +8,7 @@  Symmetric crypto       = Y
 Asymmetric crypto      = Y
 Sym operation chaining = Y
 HW Accelerated         = Y
+Protocol offload       = Y
 In Place SGL           = Y
 OOP SGL In LB  Out     = Y
 OOP SGL In SGL Out     = Y
diff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile
index 5f9a6a0e3f..14152c6117 100644
--- a/drivers/crypto/octeontx2/Makefile
+++ b/drivers/crypto/octeontx2/Makefile
@@ -38,6 +38,7 @@  SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_capabilities.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_hw_access.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_mbox.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_ops.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_sec.c
 
 # export include files
 SYMLINK-y-include +=
diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
index 0948e73607..148ec184a6 100644
--- a/drivers/crypto/octeontx2/meson.build
+++ b/drivers/crypto/octeontx2/meson.build
@@ -17,7 +17,8 @@  sources = files('otx2_cryptodev.c',
 		'otx2_cryptodev_capabilities.c',
 		'otx2_cryptodev_hw_access.c',
 		'otx2_cryptodev_mbox.c',
-		'otx2_cryptodev_ops.c')
+		'otx2_cryptodev_ops.c',
+		'otx2_cryptodev_sec.c')
 
 extra_flags = []
 # This integrated controller runs only on a arm64 machine, remove 32bit warnings
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index a51d532553..e9b7c1cc04 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -17,6 +17,7 @@ 
 #include "otx2_cryptodev_capabilities.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_sec.h"
 #include "otx2_dev.h"
 
 /* CPT common headers */
@@ -103,6 +104,11 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
 	otx2_crypto_capabilities_init(vf->hw_caps);
 
+	/* Create security ctx */
+	ret = otx2_crypto_sec_ctx_create(dev);
+	if (ret)
+		goto otx2_dev_fini;
+
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			     RTE_CRYPTODEV_FF_HW_ACCELERATED |
 			     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
@@ -111,7 +117,8 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 			     RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
 			     RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
 			     RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
-			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+			     RTE_CRYPTODEV_FF_SECURITY;
 
 	return 0;
 
@@ -140,6 +147,9 @@  otx2_cpt_pci_remove(struct rte_pci_device *pci_dev)
 	if (dev == NULL)
 		return -ENODEV;
 
+	/* Destroy security ctx */
+	otx2_crypto_sec_ctx_destroy(dev);
+
 	return rte_cryptodev_pmd_destroy(dev);
 }
 
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_sec.c b/drivers/crypto/octeontx2/otx2_cryptodev_sec.c
new file mode 100644
index 0000000000..d937e6f37a
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_sec.c
@@ -0,0 +1,46 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#include <rte_cryptodev.h>
+#include <rte_malloc.h>
+#include <rte_security.h>
+#include <rte_security_driver.h>
+
+#include "otx2_cryptodev_sec.h"
+
+static struct rte_security_ops otx2_crypto_sec_ops = {
+	.session_create		= NULL,
+	.session_destroy	= NULL,
+	.session_get_size	= NULL,
+	.set_pkt_metadata	= NULL,
+	.get_userdata		= NULL,
+	.capabilities_get	= NULL
+};
+
+int
+otx2_crypto_sec_ctx_create(struct rte_cryptodev *cdev)
+{
+	struct rte_security_ctx *ctx;
+
+	ctx = rte_malloc("otx2_cpt_dev_sec_ctx",
+			 sizeof(struct rte_security_ctx), 0);
+
+	if (ctx == NULL)
+		return -ENOMEM;
+
+	/* Populate ctx */
+	ctx->device = cdev;
+	ctx->ops = &otx2_crypto_sec_ops;
+	ctx->sess_cnt = 0;
+
+	cdev->security_ctx = ctx;
+
+	return 0;
+}
+
+void
+otx2_crypto_sec_ctx_destroy(struct rte_cryptodev *cdev)
+{
+	rte_free(cdev->security_ctx);
+}
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_sec.h b/drivers/crypto/octeontx2/otx2_cryptodev_sec.h
index 253f62d873..b989251e71 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_sec.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_sec.h
@@ -5,6 +5,8 @@ 
 #ifndef __OTX2_CRYPTODEV_SEC_H__
 #define __OTX2_CRYPTODEV_SEC_H__
 
+#include <rte_cryptodev.h>
+
 #include "otx2_ipsec_po.h"
 
 struct otx2_sec_session_ipsec_lp {
@@ -55,4 +57,8 @@  struct otx2_sec_session_ipsec_lp {
 	uint8_t auth_iv_length;
 };
 
+int otx2_crypto_sec_ctx_create(struct rte_cryptodev *crypto_dev);
+
+void otx2_crypto_sec_ctx_destroy(struct rte_cryptodev *crypto_dev);
+
 #endif /* __OTX2_CRYPTODEV_SEC_H__ */