[v2,1/1] compress/qat: revert change in GEN3 marketing name

Message ID 20200713112517.3648-2-adamx.dybkowski@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series compress/qat: revert change in GEN3 marketing name |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot success Travis build: passed
ci/Intel-compilation success Compilation OK

Commit Message

Dybkowski, AdamX July 13, 2020, 11:25 a.m. UTC
  This reverts commit 9cd9d3e702fba4700539c1a2eddac13dd14ecf70.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
---
 doc/guides/cryptodevs/qat.rst       | 6 +++---
 drivers/compress/qat/qat_comp_pmd.c | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)
  

Comments

Akhil Goyal July 15, 2020, 7:47 p.m. UTC | #1
> This reverts commit 9cd9d3e702fba4700539c1a2eddac13dd14ecf70.
> 
> Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
> ---

Applied to dpdk-next-crypto

Thanks.
  

Patch

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index c2cc3d5ca..808a5f504 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -23,7 +23,7 @@  poll mode crypto driver support for the following hardware accelerator devices:
 * ``Intel QuickAssist Technology C62x``
 * ``Intel QuickAssist Technology C3xxx``
 * ``Intel QuickAssist Technology D15xx``
-* ``Intel QuickAssist Technology P5xxx``
+* ``Intel QuickAssist Technology C4xxx``
 
 
 Features
@@ -155,7 +155,7 @@  poll mode crypto driver support for the following hardware accelerator devices:
 * ``Intel QuickAssist Technology C62x``
 * ``Intel QuickAssist Technology C3xxx``
 * ``Intel QuickAssist Technology D15xx``
-* ``Intel QuickAssist Technology P5xxx``
+* ``Intel QuickAssist Technology C4xxx``
 
 The QAT ASYM PMD has support for:
 
@@ -385,7 +385,7 @@  to see the full table)
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
    | Yes | No  | No  | 2   | D15xx    | p             | qat_d15xx     | d15xx      | 6f54   | 1    | 6f55   | 16     |
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
-   | Yes | No  | No  | 3   | P5xxx    | p             | qat_p5xxx     | p5xxx      | 18a0   | 1    | 18a1   | 128    |
+   | Yes | No  | No  | 3   | C4xxx    | p             | qat_c4xxx     | c4xxx      | 18a0   | 1    | 18a1   | 128    |
    +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
 
 * Note: Symmetric mixed crypto algorithms feature on Gen 2 works only with 01.org driver version 4.9.0+
diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c
index fe62de533..e2b5f8ce3 100644
--- a/drivers/compress/qat/qat_comp_pmd.c
+++ b/drivers/compress/qat/qat_comp_pmd.c
@@ -656,7 +656,7 @@  qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
 {
 	int i = 0;
 	if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
-		QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");
+		QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx");
 		return 0;
 	}