@@ -96,10 +96,10 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
params.dir = ULP_DIR_EGRESS;
/* copy the device port id and direction for further processing */
- ULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_INCOMING_IF,
+ ULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_INCOMING_IF,
dev->data->port_id);
- ULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_DIRECTION, params.dir);
- ULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_SVIF,
+ ULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_DIRECTION, params.dir);
+ ULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_SVIF_FLAG,
BNXT_ULP_INVALID_SVIF_VAL);
/* Parse the rte flow pattern */
@@ -662,7 +662,7 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
break;
- case BNXT_ULP_RESULT_OPC_SET_TO_COMP_HDR_FIELD:
+ case BNXT_ULP_RESULT_OPC_SET_TO_COMP_FIELD:
if (!ulp_operand_read(fld->result_operand,
(uint8_t *)&idx,
sizeof(uint16_t))) {
@@ -670,7 +670,7 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
idx = tfp_be_to_cpu_16(idx);
- if (idx < BNXT_ULP_CHF_IDX_LAST)
+ if (idx < BNXT_ULP_CF_IDX_LAST)
val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
fld->field_bit_size);
if (!val) {
@@ -754,14 +754,14 @@ ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
break;
- case BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD:
+ case BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD:
if (!ulp_operand_read(operand, (uint8_t *)&idx,
sizeof(uint16_t))) {
BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
return -EINVAL;
}
idx = tfp_be_to_cpu_16(idx);
- if (idx < BNXT_ULP_CHF_IDX_LAST)
+ if (idx < BNXT_ULP_CF_IDX_LAST)
val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
bitlen);
if (!val) {
@@ -1001,7 +1001,7 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms,
uint32_t vfr_flag, mark, gfid, mark_flag;
int32_t rc = 0;
- vfr_flag = ULP_UTIL_CHF_IDX_RD(parms, BNXT_ULP_CHF_IDX_VFR_FLAG);
+ vfr_flag = ULP_COMP_FLD_IDX_RD(parms, BNXT_ULP_CF_IDX_VFR_FLAG);
if (!(tbl->mark_enable &&
(ULP_BITMAP_ISSET(parms->act_bitmap->bits,
BNXT_ULP_ACTION_BIT_MARK) || vfr_flag)))
@@ -1044,7 +1044,7 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms,
uint64_t val64;
int32_t rc = 0;
- vfr_flag = ULP_UTIL_CHF_IDX_RD(parms, BNXT_ULP_CHF_IDX_VFR_FLAG);
+ vfr_flag = ULP_COMP_FLD_IDX_RD(parms, BNXT_ULP_CF_IDX_VFR_FLAG);
if (!(tbl->mark_enable &&
(ULP_BITMAP_ISSET(parms->act_bitmap->bits,
BNXT_ULP_ACTION_BIT_MARK) || vfr_flag)))
@@ -165,7 +165,7 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,
uint32_t ifindex;
int32_t rc;
- if (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=
+ if (ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_SVIF_FLAG) !=
BNXT_ULP_INVALID_SVIF_VAL) {
BNXT_TF_DBG(ERR,
"SVIF already set,multiple source not support'd\n");
@@ -173,8 +173,8 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,
}
if (proto == RTE_FLOW_ITEM_TYPE_PORT_ID) {
- dir = ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_DIRECTION);
+ dir = ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_DIRECTION);
/* perform the conversion from dpdk port to bnxt svif */
rc = ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, port_id,
&ifindex);
@@ -190,7 +190,7 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,
memcpy(hdr_field->spec, &svif, sizeof(svif));
memcpy(hdr_field->mask, &mask, sizeof(mask));
hdr_field->size = sizeof(svif);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_SVIF,
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_SVIF_FLAG,
rte_be_to_cpu_16(svif));
return BNXT_TF_RC_SUCCESS;
}
@@ -202,12 +202,12 @@ ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params)
uint16_t port_id = 0;
uint16_t svif_mask = 0xFFFF;
- if (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=
+ if (ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_SVIF_FLAG) !=
BNXT_ULP_INVALID_SVIF_VAL)
return BNXT_TF_RC_SUCCESS;
/* SVIF not set. So get the port id */
- port_id = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_INCOMING_IF);
+ port_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);
/* Update the SVIF details */
return ulp_rte_parser_svif_set(params, RTE_FLOW_ITEM_TYPE_PORT_ID,
@@ -238,7 +238,7 @@ ulp_rte_pf_hdr_handler(const struct rte_flow_item *item,
uint16_t svif_mask = 0xFFFF;
/* Get the port id */
- port_id = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_INCOMING_IF);
+ port_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);
/* Update the SVIF details */
return ulp_rte_parser_svif_set(params,
@@ -414,10 +414,10 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
params->vlan_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
/* Get the outer tag and inner tag counts */
- outer_vtag_num = ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_O_VTAG_NUM);
- inner_vtag_num = ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_I_VTAG_NUM);
+ outer_vtag_num = ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM);
+ inner_vtag_num = ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_I_VTAG_NUM);
/* Update the hdr_bitmap of the vlans */
hdr_bit = ¶ms->hdr_bitmap;
@@ -425,40 +425,40 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
!outer_vtag_num) {
/* Update the vlan tag num */
outer_vtag_num++;
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_NUM,
outer_vtag_num);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_PRESENT, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_PRESENT, 1);
} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
- ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
+ ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&
outer_vtag_num == 1) {
/* update the vlan tag num */
outer_vtag_num++;
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_NUM,
outer_vtag_num);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_TWO_VTAGS, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_TWO_VTAGS, 1);
} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
- ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
+ ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&
ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
!inner_vtag_num) {
/* update the vlan tag num */
inner_vtag_num++;
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_NUM,
inner_vtag_num);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_PRESENT, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_PRESENT, 1);
} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
- ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
+ ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&
ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
- ULP_UTIL_CHF_IDX_RD(params,
- BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
+ ULP_COMP_FLD_IDX_RD(params,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&
inner_vtag_num == 1) {
/* update the vlan tag num */
inner_vtag_num++;
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_NUM,
inner_vtag_num);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_TWO_VTAGS, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_TWO_VTAGS, 1);
} else {
BNXT_TF_DBG(ERR, "Error Parsing:Vlan hdr found withtout eth\n");
return BNXT_TF_RC_ERROR;
@@ -479,7 +479,7 @@ ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item,
uint32_t size;
uint32_t inner_l3, outer_l3;
- inner_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L3);
+ inner_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L3);
if (inner_l3) {
BNXT_TF_DBG(ERR, "Parse Error:Third L3 header not supported\n");
return BNXT_TF_RC_ERROR;
@@ -567,17 +567,17 @@ ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item,
params->field_idx += BNXT_ULP_PROTO_HDR_IPV4_NUM;
/* Set the ipv4 header bitmap and computed l3 header bitmaps */
- outer_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L3);
+ outer_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L3);
if (outer_l3 ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4) ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6)) {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_IPV4);
inner_l3++;
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L3, inner_l3);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3, inner_l3);
} else {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4);
outer_l3++;
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L3, outer_l3);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, outer_l3);
}
return BNXT_TF_RC_SUCCESS;
}
@@ -595,7 +595,7 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,
uint32_t size;
uint32_t inner_l3, outer_l3;
- inner_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L3);
+ inner_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L3);
if (inner_l3) {
BNXT_TF_DBG(ERR, "Parse Error: 3'rd L3 header not supported\n");
return BNXT_TF_RC_ERROR;
@@ -655,15 +655,15 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,
params->field_idx += BNXT_ULP_PROTO_HDR_IPV6_NUM;
/* Set the ipv6 header bitmap and computed l3 header bitmaps */
- outer_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L3);
+ outer_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L3);
if (outer_l3 ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4) ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6)) {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_IPV6);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L3, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3, 1);
} else {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L3, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, 1);
}
return BNXT_TF_RC_SUCCESS;
}
@@ -681,7 +681,7 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,
uint32_t size;
uint32_t inner_l4, outer_l4;
- inner_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L4);
+ inner_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L4);
if (inner_l4) {
BNXT_TF_DBG(ERR, "Parse Err:Third L4 header not supported\n");
return BNXT_TF_RC_ERROR;
@@ -728,15 +728,15 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,
params->field_idx += BNXT_ULP_PROTO_HDR_UDP_NUM;
/* Set the udp header bitmap and computed l4 header bitmaps */
- outer_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L4);
+ outer_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L4);
if (outer_l4 ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_UDP);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L4, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);
} else {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L4, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);
}
return BNXT_TF_RC_SUCCESS;
}
@@ -754,7 +754,7 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,
uint32_t size;
uint32_t inner_l4, outer_l4;
- inner_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L4);
+ inner_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L4);
if (inner_l4) {
BNXT_TF_DBG(ERR, "Parse Error:Third L4 header not supported\n");
return BNXT_TF_RC_ERROR;
@@ -838,15 +838,15 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,
params->field_idx += BNXT_ULP_PROTO_HDR_TCP_NUM;
/* Set the udp header bitmap and computed l4 header bitmaps */
- outer_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L4);
+ outer_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L4);
if (outer_l4 ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||
ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_TCP);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L4, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);
} else {
ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP);
- ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L4, 1);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);
}
return BNXT_TF_RC_SUCCESS;
}
@@ -1211,7 +1211,7 @@ ulp_rte_pf_act_handler(const struct rte_flow_action *action_item __rte_unused,
ULP_BITMAP_SET(params->act_bitmap.bits, BNXT_ULP_ACTION_BIT_VNIC);
/* copy the PF of the current device into VNIC Property */
- svif = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_INCOMING_IF);
+ svif = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);
svif = bnxt_get_vnic_id(svif);
svif = rte_cpu_to_be_32(svif);
memcpy(¶ms->act_prop.act_details[BNXT_ULP_ACT_PROP_IDX_VNIC],
@@ -834,10 +834,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
- .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD,
+ .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD,
.spec_operand = {
- (BNXT_ULP_CHF_IDX_O_VTAG_NUM >> 8) & 0xff,
- BNXT_ULP_CHF_IDX_O_VTAG_NUM & 0xff,
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -96,23 +96,37 @@ enum bnxt_ulp_cache_tbl_id {
BNXT_ULP_CACHE_TBL_ID_LAST = 4
};
-enum bnxt_ulp_chf_idx {
- BNXT_ULP_CHF_IDX_MPLS_TAG_NUM = 0,
- BNXT_ULP_CHF_IDX_O_VTAG_NUM = 1,
- BNXT_ULP_CHF_IDX_O_VTAG_PRESENT = 2,
- BNXT_ULP_CHF_IDX_O_TWO_VTAGS = 3,
- BNXT_ULP_CHF_IDX_I_VTAG_NUM = 4,
- BNXT_ULP_CHF_IDX_I_VTAG_PRESENT = 5,
- BNXT_ULP_CHF_IDX_I_TWO_VTAGS = 6,
- BNXT_ULP_CHF_IDX_INCOMING_IF = 7,
- BNXT_ULP_CHF_IDX_DIRECTION = 8,
- BNXT_ULP_CHF_IDX_SVIF = 9,
- BNXT_ULP_CHF_IDX_O_L3 = 10,
- BNXT_ULP_CHF_IDX_I_L3 = 11,
- BNXT_ULP_CHF_IDX_O_L4 = 12,
- BNXT_ULP_CHF_IDX_I_L4 = 13,
- BNXT_ULP_CHF_IDX_VFR_FLAG = 14,
- BNXT_ULP_CHF_IDX_LAST = 15
+enum bnxt_ulp_cf_idx {
+ BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 0,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM = 1,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT = 2,
+ BNXT_ULP_CF_IDX_O_TWO_VTAGS = 3,
+ BNXT_ULP_CF_IDX_I_VTAG_NUM = 4,
+ BNXT_ULP_CF_IDX_I_VTAG_PRESENT = 5,
+ BNXT_ULP_CF_IDX_I_TWO_VTAGS = 6,
+ BNXT_ULP_CF_IDX_INCOMING_IF = 7,
+ BNXT_ULP_CF_IDX_DIRECTION = 8,
+ BNXT_ULP_CF_IDX_SVIF_FLAG = 9,
+ BNXT_ULP_CF_IDX_O_L3 = 10,
+ BNXT_ULP_CF_IDX_I_L3 = 11,
+ BNXT_ULP_CF_IDX_O_L4 = 12,
+ BNXT_ULP_CF_IDX_I_L4 = 13,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID = 14,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 15,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 16,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 17,
+ BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 18,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 19,
+ BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 20,
+ BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 21,
+ BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 22,
+ BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 23,
+ BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 24,
+ BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 25,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 26,
+ BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 27,
+ BNXT_ULP_CF_IDX_VFR_FLAG = 28,
+ BNXT_ULP_CF_IDX_LAST = 29
};
enum bnxt_ulp_def_regfile_index {
@@ -214,7 +228,7 @@ enum bnxt_ulp_result_opc {
BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 2,
BNXT_ULP_RESULT_OPC_SET_TO_REGFILE = 3,
BNXT_ULP_RESULT_OPC_SET_TO_DEF_REGFILE = 4,
- BNXT_ULP_RESULT_OPC_SET_TO_COMP_HDR_FIELD = 5,
+ BNXT_ULP_RESULT_OPC_SET_TO_COMP_FIELD = 5,
BNXT_ULP_RESULT_OPC_LAST = 6
};
@@ -227,7 +241,7 @@ enum bnxt_ulp_search_before_alloc {
enum bnxt_ulp_spec_opc {
BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,
BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,
- BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD = 2,
+ BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD = 2,
BNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 3,
BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 4,
BNXT_ULP_SPEC_OPC_ADD_PAD = 5,
@@ -60,7 +60,7 @@ struct ulp_rte_parser_params {
struct ulp_rte_hdr_bitmap hdr_bitmap;
struct ulp_rte_field_bitmap fld_bitmap;
struct ulp_rte_hdr_field hdr_field[BNXT_ULP_PROTO_HDR_MAX];
- uint32_t comp_fld[BNXT_ULP_CHF_IDX_LAST];
+ uint32_t comp_fld[BNXT_ULP_CF_IDX_LAST];
uint32_t field_idx;
uint32_t vlan_idx;
struct ulp_rte_act_bitmap act_bitmap;
@@ -51,10 +51,10 @@
#define ULP_BITS_2_BYTE_NR(bits_x) ((bits_x) / 8)
/* Macros to read the computed fields */
-#define ULP_UTIL_CHF_IDX_RD(params, idx) \
+#define ULP_COMP_FLD_IDX_RD(params, idx) \
rte_be_to_cpu_32((params)->comp_fld[(idx)])
-#define ULP_UTIL_CHF_IDX_WR(params, idx, val) \
+#define ULP_COMP_FLD_IDX_WR(params, idx, val) \
((params)->comp_fld[(idx)] = rte_cpu_to_be_32((val)))
/*
* Making the blob statically sized to 128 bytes for now.