From patchwork Wed Jun 3 02:39:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 70793 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1CBA5A04EF; Wed, 3 Jun 2020 04:41:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 012421D453; Wed, 3 Jun 2020 04:37:26 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 7D7071D179 for ; Wed, 3 Jun 2020 04:37:24 +0200 (CEST) IronPort-SDR: 0lfsXC7eY32gcnLgUGeu4T+qKvKzU0OjjDIiKCzK7EVC6usPYf/dhF3tvl4NWkt1DHG1i1FiBp I7vIyZzVqJUg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2020 19:37:24 -0700 IronPort-SDR: TQ2/vVnSgvDpmjtZ3U84reCj/t8vrqEKRGqRJ7A4yA6yjo9vZNVQP0DVSANGcPtyvedVRO67vV +fUniV8RRs/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,466,1583222400"; d="scan'208";a="347614117" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by orsmga001.jf.intel.com with ESMTP; 02 Jun 2020 19:37:22 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Kiran Patil , "Paul M . Stillwell Jr" Date: Wed, 3 Jun 2020 10:39:55 +0800 Message-Id: <20200603024016.30636-32-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200603024016.30636-1-qi.z.zhang@intel.com> References: <20200603024016.30636-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 31/52] net/ice/base: reset flags when all rules are deleted X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" To avoid having stale information about "adv_rule" per recipe, when all rules associated to a given recipe are deleted, reset the "adv_rule" flag otherwise it causes problem later on when decisions about filter rules being present or not are made based on "adv_rule" flag. Removed setting "adv_rule = 1" when recipe is created. It is set correctly when advanced switch rule is added referring to the recipe which was created as a result of adding advanced switch rule. Signed-off-by: Kiran Patil Signed-off-by: Paul M. Stillwell Jr Signed-off-by: Qi Zhang Signed-off-by: Kiran Patil Signed-off-by: Paul M. Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_switch.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 94268d560..f379a5f5d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4122,6 +4122,9 @@ void ice_rem_all_sw_rules_info(struct ice_hw *hw) ice_rem_sw_rule_info(hw, rule_head); else ice_rem_adv_rule_info(hw, rule_head); + if (sw->recp_list[i].adv_rule && + LIST_EMPTY(&sw->recp_list[i].filt_rules)) + sw->recp_list[i].adv_rule = false; } } @@ -6130,7 +6133,6 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm, recp->n_grp_count = rm->n_grp_count; recp->tun_type = rm->tun_type; recp->recp_created = true; - recp->adv_rule = 1; } rm->root_buf = buf; ice_free(hw, tmp); @@ -7611,11 +7613,15 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, rule_buf_sz, 1, ice_aqc_opc_remove_sw_rules, NULL); if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) { + struct ice_switch_info *sw = hw->switch_info; + ice_acquire_lock(rule_lock); LIST_DEL(&list_elem->list_entry); ice_free(hw, list_elem->lkups); ice_free(hw, list_elem); ice_release_lock(rule_lock); + if (LIST_EMPTY(&sw->recp_list[rid].filt_rules)) + sw->recp_list[rid].adv_rule = false; } ice_free(hw, s_rule); }