[v5] eal/cpuflags: add x86 based cpu flags
Checks
Commit Message
This patch adds CPU flags which will enable the detection of ISA
features available on more recent x86 based CPUs.
The CPUID leaf information can be found in
Table 1-2. "Information Returned by CPUID Instruction" of this document:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
The following CPU flags are added in this patch:
- AVX-512 doubleword and quadword instructions.
- AVX-512 integer fused multiply-add instructions.
- AVX-512 conflict detection instructions.
- AVX-512 byte and word instructions.
- AVX-512 vector length instructions.
- AVX-512 vector bit manipulation instructions.
- AVX-512 vector bit manipulation 2 instructions.
- Galois field new instructions.
- Vector AES instructions.
- Vector carry-less multiply instructions.
- AVX-512 vector neural network instructions.
- AVX-512 for bit algorithm instructions.
- AVX-512 vector popcount instructions.
- Cache line demote instructions.
- Direct store instructions.
- Direct store 64B instructions.
- AVX-512 two register intersection instructions.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
v2:
- Squashed patch set into single patch.
v3:
- Add abignore entry for 'rte_cpu_flag_t'.
v4:
- Updated commit message to reflect updated ISA doc linked.
- Fixed line wrap for VNNI comment.
- Rebased on master.
v5:
- Update abignore entry justification.
---
devtools/libabigail.abignore | 5 +++++
lib/librte_eal/x86/include/rte_cpuflags.h | 19 +++++++++++++++++++
lib/librte_eal/x86/rte_cpuflags.c | 18 ++++++++++++++++++
3 files changed, 42 insertions(+)
Comments
On 28/04/2020 13:40, Kevin Laatz wrote:
> This patch adds CPU flags which will enable the detection of ISA
> features available on more recent x86 based CPUs.
>
> The CPUID leaf information can be found in
> Table 1-2. "Information Returned by CPUID Instruction" of this document:
> https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
>
> The following CPU flags are added in this patch:
> - AVX-512 doubleword and quadword instructions.
> - AVX-512 integer fused multiply-add instructions.
> - AVX-512 conflict detection instructions.
> - AVX-512 byte and word instructions.
> - AVX-512 vector length instructions.
> - AVX-512 vector bit manipulation instructions.
> - AVX-512 vector bit manipulation 2 instructions.
> - Galois field new instructions.
> - Vector AES instructions.
> - Vector carry-less multiply instructions.
> - AVX-512 vector neural network instructions.
> - AVX-512 for bit algorithm instructions.
> - AVX-512 vector popcount instructions.
> - Cache line demote instructions.
> - Direct store instructions.
> - Direct store 64B instructions.
> - AVX-512 two register intersection instructions.
>
> Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
>
> ---
> v2:
> - Squashed patch set into single patch.
>
> v3:
> - Add abignore entry for 'rte_cpu_flag_t'.
>
> v4:
> - Updated commit message to reflect updated ISA doc linked.
> - Fixed line wrap for VNNI comment.
> - Rebased on master.
>
> v5:
> - Update abignore entry justification.
> ---
> devtools/libabigail.abignore | 5 +++++
> lib/librte_eal/x86/include/rte_cpuflags.h | 19 +++++++++++++++++++
> lib/librte_eal/x86/rte_cpuflags.c | 18 ++++++++++++++++++
> 3 files changed, 42 insertions(+)
>
> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> index a59df8f13..045f436fb 100644
> --- a/devtools/libabigail.abignore
> +++ b/devtools/libabigail.abignore
Kevin - you still have the surpession.
I am testing locally with 1.7.1, and it doesn't complain when I disable the supression.
Are you seeing something different?
> @@ -11,3 +11,8 @@
> type_kind = enum
> name = rte_crypto_asym_xform_type
> changed_enumerators = RTE_CRYPTO_ASYM_XFORM_TYPE_LIST_END
> +; Ignore this enum update as new flags remain unknown to applications
> +[suppress_type]
> + type_kind = enum
> + name = rte_cpu_flag_t
> + changed_enumerators = RTE_CPUFLAG_NUMFLAGS
> diff --git a/lib/librte_eal/x86/include/rte_cpuflags.h b/lib/librte_eal/x86/include/rte_cpuflags.h
> index 25ba47b96..c1d20364d 100644
> --- a/lib/librte_eal/x86/include/rte_cpuflags.h
> +++ b/lib/librte_eal/x86/include/rte_cpuflags.h
> @@ -113,6 +113,25 @@ enum rte_cpu_flag_t {
> /* (EAX 80000007h) EDX features */
> RTE_CPUFLAG_INVTSC, /**< INVTSC */
>
> + RTE_CPUFLAG_AVX512DQ, /**< AVX512 Doubleword and Quadword */
> + RTE_CPUFLAG_AVX512IFMA, /**< AVX512 Integer Fused Multiply-Add */
> + RTE_CPUFLAG_AVX512CD, /**< AVX512 Conflict Detection*/
> + RTE_CPUFLAG_AVX512BW, /**< AVX512 Byte and Word */
> + RTE_CPUFLAG_AVX512VL, /**< AVX512 Vector Length */
> + RTE_CPUFLAG_AVX512VBMI, /**< AVX512 Vector Bit Manipulation */
> + RTE_CPUFLAG_AVX512VBMI2, /**< AVX512 Vector Bit Manipulation 2 */
> + RTE_CPUFLAG_GFNI, /**< Galois Field New Instructions */
> + RTE_CPUFLAG_VAES, /**< Vector AES */
> + RTE_CPUFLAG_VPCLMULQDQ, /**< Vector Carry-less Multiply */
> + RTE_CPUFLAG_AVX512VNNI,
> + /**< AVX512 Vector Neural Network Instructions */
> + RTE_CPUFLAG_AVX512BITALG, /**< AVX512 Bit Algorithms */
> + RTE_CPUFLAG_AVX512VPOPCNTDQ, /**< AVX512 Vector Popcount */
> + RTE_CPUFLAG_CLDEMOTE, /**< Cache Line Demote */
> + RTE_CPUFLAG_MOVDIRI, /**< Direct Store Instructions */
> + RTE_CPUFLAG_MOVDIR64B, /**< Direct Store Instructions 64B */
> + RTE_CPUFLAG_AVX512VP2INTERSECT, /**< AVX512 Two Register Intersection */
> +
> /* The last item */
> RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */
> };
> diff --git a/lib/librte_eal/x86/rte_cpuflags.c b/lib/librte_eal/x86/rte_cpuflags.c
> index 6492df556..30439e795 100644
> --- a/lib/librte_eal/x86/rte_cpuflags.c
> +++ b/lib/librte_eal/x86/rte_cpuflags.c
> @@ -120,6 +120,24 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29)
>
> FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8)
> +
> + FEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)
> + FEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)
> + FEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)
> + FEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)
> + FEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)
> + FEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX, 1)
> + FEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX, 6)
> + FEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX, 8)
> + FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)
> + FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)
> + FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)
> + FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)
> + FEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX, 14)
> + FEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)
> + FEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)
> + FEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)
> + FEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8)
> };
>
> int
>
<snip>
> > ---
> > devtools/libabigail.abignore | 5 +++++
> > lib/librte_eal/x86/include/rte_cpuflags.h | 19 +++++++++++++++++++
> > lib/librte_eal/x86/rte_cpuflags.c | 18 ++++++++++++++++++
> > 3 files changed, 42 insertions(+)
> >
> > diff --git a/devtools/libabigail.abignore
> > b/devtools/libabigail.abignore index a59df8f13..045f436fb 100644
> > --- a/devtools/libabigail.abignore
> > +++ b/devtools/libabigail.abignore
>
> Kevin - you still have the surpession.
> I am testing locally with 1.7.1, and it doesn't complain when I disable the
> supression.
> Are you seeing something different?
>
Ray,
I have re-tested and with libabigail 1.6 and it reports the addition of the flags as an ABI break without the abignore suppression.
With the suppression, it will still report changes to existing flags (e.g. inserting a new flag somewhere in the middle) in the enum as an ABI break, as expected.
The Travis CI is also based on Ubuntu 18.04 LTS, which uses libabigail 1.2-1. Without the suppression the community Travis CI builds fail on this false positive.
-Kevin
28/04/2020 20:11, Laatz, Kevin:
> > > --- a/devtools/libabigail.abignore
> > > +++ b/devtools/libabigail.abignore
> >
> > Kevin - you still have the surpession.
> > I am testing locally with 1.7.1, and it doesn't complain when I disable the
> > supression.
> > Are you seeing something different?
> >
>
> Ray,
> I have re-tested and with libabigail 1.6 and it reports the addition of the flags as an ABI break without the abignore suppression.
> With the suppression, it will still report changes to existing flags (e.g. inserting a new flag somewhere in the middle) in the enum as an ABI break, as expected.
>
> The Travis CI is also based on Ubuntu 18.04 LTS, which uses libabigail 1.2-1. Without the suppression the community Travis CI builds fail on this false positive.
I think Travis uses libabigail 1.6:
http://git.dpdk.org/dpdk/tree/.ci/linux-build.sh#n61
On Tue, 28 Apr 2020 17:39:24 +0100
Ray Kinsella <mdr@ashroe.eu> wrote:
> > +
> > /* The last item */
> > RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */
> > };
These kind of enums break API's. We should remove them all in 20.11.
On Tue, Apr 28, 2020 at 6:39 PM Ray Kinsella <mdr@ashroe.eu> wrote:
> > diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> > index a59df8f13..045f436fb 100644
> > --- a/devtools/libabigail.abignore
> > +++ b/devtools/libabigail.abignore
>
> Kevin - you still have the surpession.
> I am testing locally with 1.7.1, and it doesn't complain when I disable the supression.
> Are you seeing something different?
Using current master libabigail, without the rule Kevin included, I
get the warning:
1 function with some indirect sub-type change:
[C] 'function int rte_cpu_get_flag_enabled(rte_cpu_flag_t)' at
rte_cpuflags.c:144:1 has some indirect sub-type changes:
parameter 1 of type 'enum rte_cpu_flag_t' has sub-type changes:
type size hasn't changed
17 enumerator insertions:
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512DQ' value '87'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512IFMA' value '88'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512CD' value '89'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512BW' value '90'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VL' value '91'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VBMI' value '92'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VBMI2' value '93'
'rte_cpu_flag_t::RTE_CPUFLAG_GFNI' value '94'
'rte_cpu_flag_t::RTE_CPUFLAG_VAES' value '95'
'rte_cpu_flag_t::RTE_CPUFLAG_VPCLMULQDQ' value '96'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VNNI' value '97'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512BITALG' value '98'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VPOPCNTDQ' value '99'
'rte_cpu_flag_t::RTE_CPUFLAG_CLDEMOTE' value '100'
'rte_cpu_flag_t::RTE_CPUFLAG_MOVDIRI' value '101'
'rte_cpu_flag_t::RTE_CPUFLAG_MOVDIR64B' value '102'
'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VP2INTERSECT' value '103'
1 enumerator change:
'rte_cpu_flag_t::RTE_CPUFLAG_NUMFLAGS' from value '87' to
'104' at rte_cpuflags.h:12:1
Ray, could you check that the reference and new dumps in your env
contain this enum?
$ grep RTE_CPUFLAG_NUMFLAGS
$HOME/abi/v20.02/x86_64-native-linux-gcc+shared+debug+ASSERT+RTE_IBVERBS_LINK_DLOPEN/dump/librte_eal.dump
<enumerator name='RTE_CPUFLAG_NUMFLAGS' value='87'/>
$ grep RTE_CPUFLAG_NUMFLAGS
$HOME/builds/x86_64-native-linux-gcc+shared+debug+ASSERT+RTE_IBVERBS_LINK_DLOPEN/install/dump/librte_eal.dump
<enumerator name='RTE_CPUFLAG_NUMFLAGS' value='104'/>
If you are missing those, you might have built dpdk without debuginfo.
So that isn't the issue either.
$ grep RTE_CPUFLAG_NUMFLAGS build-gcc-shared/install/dump/librte_eal.dump
4646: <enumerator name='RTE_CPUFLAG_NUMFLAGS' value='104'/>
$ grep RTE_CPUFLAG_NUMFLAGS /build/dpdk/reference/v20.02/build-gcc-shared/dump/librte_eal.dump
3296: <enumerator name='RTE_CPUFLAG_NUMFLAGS' value='87'/>
1.7-1.fc31 @updates
I finally got libabigail complaining about rte_cpu_flag_t, after doing a complete clear down.
So the suppression _is_ required.
I then spent the following hour trying to identify the gremlin in the system with no luck.
In anycase, added my ack below.
On 29/04/2020 12:39, David Marchand wrote:
> On Tue, Apr 28, 2020 at 6:39 PM Ray Kinsella <mdr@ashroe.eu> wrote:
>>> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
>>> index a59df8f13..045f436fb 100644
>>> --- a/devtools/libabigail.abignore
>>> +++ b/devtools/libabigail.abignore
>>
>> Kevin - you still have the surpession.
>> I am testing locally with 1.7.1, and it doesn't complain when I disable the supression.
>> Are you seeing something different?
>
> Using current master libabigail, without the rule Kevin included, I
> get the warning:
>
> 1 function with some indirect sub-type change:
>
> [C] 'function int rte_cpu_get_flag_enabled(rte_cpu_flag_t)' at
> rte_cpuflags.c:144:1 has some indirect sub-type changes:
> parameter 1 of type 'enum rte_cpu_flag_t' has sub-type changes:
> type size hasn't changed
> 17 enumerator insertions:
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512DQ' value '87'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512IFMA' value '88'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512CD' value '89'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512BW' value '90'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VL' value '91'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VBMI' value '92'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VBMI2' value '93'
> 'rte_cpu_flag_t::RTE_CPUFLAG_GFNI' value '94'
> 'rte_cpu_flag_t::RTE_CPUFLAG_VAES' value '95'
> 'rte_cpu_flag_t::RTE_CPUFLAG_VPCLMULQDQ' value '96'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VNNI' value '97'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512BITALG' value '98'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VPOPCNTDQ' value '99'
> 'rte_cpu_flag_t::RTE_CPUFLAG_CLDEMOTE' value '100'
> 'rte_cpu_flag_t::RTE_CPUFLAG_MOVDIRI' value '101'
> 'rte_cpu_flag_t::RTE_CPUFLAG_MOVDIR64B' value '102'
> 'rte_cpu_flag_t::RTE_CPUFLAG_AVX512VP2INTERSECT' value '103'
> 1 enumerator change:
> 'rte_cpu_flag_t::RTE_CPUFLAG_NUMFLAGS' from value '87' to
> '104' at rte_cpuflags.h:12:1
>
>
> Ray, could you check that the reference and new dumps in your env
> contain this enum?
>
> $ grep RTE_CPUFLAG_NUMFLAGS
> $HOME/abi/v20.02/x86_64-native-linux-gcc+shared+debug+ASSERT+RTE_IBVERBS_LINK_DLOPEN/dump/librte_eal.dump
> <enumerator name='RTE_CPUFLAG_NUMFLAGS' value='87'/>
> $ grep RTE_CPUFLAG_NUMFLAGS
> $HOME/builds/x86_64-native-linux-gcc+shared+debug+ASSERT+RTE_IBVERBS_LINK_DLOPEN/install/dump/librte_eal.dump
> <enumerator name='RTE_CPUFLAG_NUMFLAGS' value='104'/>
>
> If you are missing those, you might have built dpdk without debuginfo.
>
Acked-By: Ray Kinsella <mdr@ashroe.eu>
> Acked-By: Ray Kinsella <mdr@ashroe.eu>
Applied, thanks
@@ -11,3 +11,8 @@
type_kind = enum
name = rte_crypto_asym_xform_type
changed_enumerators = RTE_CRYPTO_ASYM_XFORM_TYPE_LIST_END
+; Ignore this enum update as new flags remain unknown to applications
+[suppress_type]
+ type_kind = enum
+ name = rte_cpu_flag_t
+ changed_enumerators = RTE_CPUFLAG_NUMFLAGS
@@ -113,6 +113,25 @@ enum rte_cpu_flag_t {
/* (EAX 80000007h) EDX features */
RTE_CPUFLAG_INVTSC, /**< INVTSC */
+ RTE_CPUFLAG_AVX512DQ, /**< AVX512 Doubleword and Quadword */
+ RTE_CPUFLAG_AVX512IFMA, /**< AVX512 Integer Fused Multiply-Add */
+ RTE_CPUFLAG_AVX512CD, /**< AVX512 Conflict Detection*/
+ RTE_CPUFLAG_AVX512BW, /**< AVX512 Byte and Word */
+ RTE_CPUFLAG_AVX512VL, /**< AVX512 Vector Length */
+ RTE_CPUFLAG_AVX512VBMI, /**< AVX512 Vector Bit Manipulation */
+ RTE_CPUFLAG_AVX512VBMI2, /**< AVX512 Vector Bit Manipulation 2 */
+ RTE_CPUFLAG_GFNI, /**< Galois Field New Instructions */
+ RTE_CPUFLAG_VAES, /**< Vector AES */
+ RTE_CPUFLAG_VPCLMULQDQ, /**< Vector Carry-less Multiply */
+ RTE_CPUFLAG_AVX512VNNI,
+ /**< AVX512 Vector Neural Network Instructions */
+ RTE_CPUFLAG_AVX512BITALG, /**< AVX512 Bit Algorithms */
+ RTE_CPUFLAG_AVX512VPOPCNTDQ, /**< AVX512 Vector Popcount */
+ RTE_CPUFLAG_CLDEMOTE, /**< Cache Line Demote */
+ RTE_CPUFLAG_MOVDIRI, /**< Direct Store Instructions */
+ RTE_CPUFLAG_MOVDIR64B, /**< Direct Store Instructions 64B */
+ RTE_CPUFLAG_AVX512VP2INTERSECT, /**< AVX512 Two Register Intersection */
+
/* The last item */
RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */
};
@@ -120,6 +120,24 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29)
FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8)
+
+ FEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)
+ FEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)
+ FEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)
+ FEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)
+ FEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)
+ FEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX, 1)
+ FEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX, 6)
+ FEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX, 8)
+ FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)
+ FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)
+ FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)
+ FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)
+ FEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX, 14)
+ FEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)
+ FEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)
+ FEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)
+ FEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8)
};
int