diff mbox series

[v2,4/4] net/bnxt: add truflow flush-timer to alloc table scope API

Message ID 20200425140141.27947-5-ajit.khaparde@broadcom.com (mailing list archive)
State Accepted, archived
Delegated to: Ajit Khaparde
Headers
Series introduce changes to support flow scaling |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot success Travis build: passed
ci/Intel-compilation success Compilation OK

Commit Message

Ajit Khaparde April 25, 2020, 2:01 p.m. UTC 
  From: Shahaji Bhosle <shahaji.bhosle@broadcom.com>

Updated the params list to include flush timer, this will
allow users to set the HW flush timer value in 10th of second.
Setting 0 will disable the pending cache flush feature.

Signed-off-by: Shahaji Bhosle <shahaji.bhosle@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/tf_core/tf_core.h | 6 ++++++
 drivers/net/bnxt/tf_core/tf_msg.c  | 3 +++
 drivers/net/bnxt/tf_core/tf_msg.h  | 1 +
 drivers/net/bnxt/tf_core/tf_tbl.c  | 1 +
 drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 6 ++++++
 5 files changed, 17 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h
index 4b60973ee..1eedd80e7 100644
--- a/drivers/net/bnxt/tf_core/tf_core.h
+++ b/drivers/net/bnxt/tf_core/tf_core.h
@@ -560,6 +560,12 @@  struct tf_alloc_tbl_scope_parms {
 	 * [in] Brd4 only receive table access interface id
 	 */
 	uint32_t tx_tbl_if_id;
+	/**
+	 * [in] Flush pending HW cached flows every 1/10th of value
+	 * set in seconds, both idle and active flows are flushed
+	 * from the HW cache. If set to 0, this feature will be disabled.
+	 */
+	uint8_t hw_flow_cache_flush_timer;
 	/**
 	 * [out] table scope identifier
 	 */
diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c
index bdf8f155f..beecafdeb 100644
--- a/drivers/net/bnxt/tf_core/tf_msg.c
+++ b/drivers/net/bnxt/tf_core/tf_msg.c
@@ -978,6 +978,7 @@  int tf_msg_em_cfg(struct tf *tfp,
 		  uint16_t   key1_ctx_id,
 		  uint16_t   record_ctx_id,
 		  uint16_t   efc_ctx_id,
+		  uint8_t    flush_interval,
 		  int        dir)
 {
 	int rc;
@@ -993,6 +994,8 @@  int tf_msg_em_cfg(struct tf *tfp,
 	req.flags = tfp_cpu_to_le_32(flags);
 	req.num_entries = tfp_cpu_to_le_32(num_entries);
 
+	req.flush_interval = flush_interval;
+
 	req.key0_ctx_id = tfp_cpu_to_le_16(key0_ctx_id);
 	req.key1_ctx_id = tfp_cpu_to_le_16(key1_ctx_id);
 	req.record_ctx_id = tfp_cpu_to_le_16(record_ctx_id);
diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h
index b8d8c1ede..030d1881e 100644
--- a/drivers/net/bnxt/tf_core/tf_msg.h
+++ b/drivers/net/bnxt/tf_core/tf_msg.h
@@ -152,6 +152,7 @@  int tf_msg_em_cfg(struct tf *tfp,
 		  uint16_t      key1_ctx_id,
 		  uint16_t      record_ctx_id,
 		  uint16_t      efc_ctx_id,
+		  uint8_t       flush_interval,
 		  int           dir);
 
 /**
diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c
index 236affe25..93f387e86 100644
--- a/drivers/net/bnxt/tf_core/tf_tbl.c
+++ b/drivers/net/bnxt/tf_core/tf_tbl.c
@@ -1500,6 +1500,7 @@  tf_alloc_eem_tbl_scope(struct tf *tfp,
 				   em_tables[KEY1_TABLE].ctx_id,
 				   em_tables[RECORD_TABLE].ctx_id,
 				   em_tables[EFC_TABLE].ctx_id,
+				   parms->hw_flow_cache_flush_timer,
 				   dir);
 		if (rc) {
 			PMD_DRV_LOG(ERR,
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
index f8047f0d6..a9cc92d34 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
@@ -121,6 +121,12 @@  bnxt_init_tbl_scope_parms(struct bnxt *bp,
 	else
 		dparms = bnxt_ulp_device_params_get(dev_id);
 
+	/*
+	 * Set the flush timer for EEM entries. The value is in 100ms intervals,
+	 * so 100 is 10s.
+	 */
+	params->hw_flow_cache_flush_timer = 100;
+
 	if (!dparms) {
 		params->rx_max_key_sz_in_bits = BNXT_ULP_DFLT_RX_MAX_KEY;
 		params->rx_max_action_entry_sz_in_bits =