diff mbox series

[v2] net/i40e: fix queue region issue in RSS flow

Message ID 20200424093605.20519-1-shougangx.wang@intel.com (mailing list archive)
State Superseded, archived
Delegated to: xiaolong ye
Headers
Series [v2] net/i40e: fix queue region issue in RSS flow |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-nxp-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-testing fail Testing issues
ci/travis-robot success Travis build: passed
ci/Intel-compilation fail Compilation issues

Commit Message

Shougang Wang April 24, 2020, 9:36 a.m. UTC 
  This patch fixes the issue that the queue region does not
take effect due to incorrectly setting the flow type.

Fixes: ecad87d22383 ("net/i40e: move RSS to flow API")
Cc: stable@dpdk.org

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
---
v2:
-Update the various name.
---
 drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++++++---
 1 file changed, 31 insertions(+), 3 deletions(-)

Comments

Guo, Jia May 12, 2020, 9:37 a.m. UTC | #1 
hi, shougang

On 4/24/2020 5:36 PM, Shougang Wang wrote:
> This patch fixes the issue that the queue region does not
> take effect due to incorrectly setting the flow type.
>
> Fixes: ecad87d22383 ("net/i40e: move RSS to flow API")
> Cc: stable@dpdk.org
>
> Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
> ---
> v2:
> -Update the various name.
> ---
>   drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++++++---
>   1 file changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index 7e64ae53a..9a306aed6 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -4624,6 +4624,33 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
>   	uint16_t i, j, n, tmp, nb_types;
>   	uint32_t index = 0;
>   	uint64_t hf_bit = 1;


I am not sure that a null line here or flow the Christmas tree to let it 
look good?  Other looks good and you could add my Review-by.


> +	static const struct {
> +		uint64_t rss_type;
> +		enum i40e_filter_pctype pctype;
> +	} pctype_match_table[] = {
> +		{ETH_RSS_FRAG_IPV4,
> +			I40E_FILTER_PCTYPE_FRAG_IPV4},
> +		{ETH_RSS_NONFRAG_IPV4_TCP,
> +			I40E_FILTER_PCTYPE_NONF_IPV4_TCP},
> +		{ETH_RSS_NONFRAG_IPV4_UDP,
> +			I40E_FILTER_PCTYPE_NONF_IPV4_UDP},
> +		{ETH_RSS_NONFRAG_IPV4_SCTP,
> +			I40E_FILTER_PCTYPE_NONF_IPV4_SCTP},
> +		{ETH_RSS_NONFRAG_IPV4_OTHER,
> +			I40E_FILTER_PCTYPE_NONF_IPV4_OTHER},
> +		{ETH_RSS_FRAG_IPV6,
> +			I40E_FILTER_PCTYPE_FRAG_IPV6},
> +		{ETH_RSS_NONFRAG_IPV6_TCP,
> +			I40E_FILTER_PCTYPE_NONF_IPV6_TCP},
> +		{ETH_RSS_NONFRAG_IPV6_UDP,
> +			I40E_FILTER_PCTYPE_NONF_IPV6_UDP},
> +		{ETH_RSS_NONFRAG_IPV6_SCTP,
> +			I40E_FILTER_PCTYPE_NONF_IPV6_SCTP},
> +		{ETH_RSS_NONFRAG_IPV6_OTHER,
> +			I40E_FILTER_PCTYPE_NONF_IPV6_OTHER},
> +		{ETH_RSS_L2_PAYLOAD,
> +			I40E_FILTER_PCTYPE_L2_PAYLOAD},
> +	};
>   
>   	NEXT_ITEM_OF_ACTION(act, actions, index);
>   	rss = act->conf;
> @@ -4641,9 +4668,10 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
>   	}
>   
>   	if (p_info.action_flag) {
> -		for (n = 0; n < 64; n++) {
> -			if (rss->types & (hf_bit << n)) {
> -				conf_info->region[0].hw_flowtype[0] = n;
> +		for (j = 0; j < RTE_DIM(pctype_match_table); j++) {
> +			if (rss->types & pctype_match_table[j].rss_type) {
> +				conf_info->region[0].hw_flowtype[0] =
> +					(uint8_t)pctype_match_table[j].pctype;
>   				conf_info->region[0].flowtype_num = 1;
>   				conf_info->queue_region_number = 1;
>   				break;
diff mbox series

Patch

diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index 7e64ae53a..9a306aed6 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -4624,6 +4624,33 @@  i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
 	uint16_t i, j, n, tmp, nb_types;
 	uint32_t index = 0;
 	uint64_t hf_bit = 1;
+	static const struct {
+		uint64_t rss_type;
+		enum i40e_filter_pctype pctype;
+	} pctype_match_table[] = {
+		{ETH_RSS_FRAG_IPV4,
+			I40E_FILTER_PCTYPE_FRAG_IPV4},
+		{ETH_RSS_NONFRAG_IPV4_TCP,
+			I40E_FILTER_PCTYPE_NONF_IPV4_TCP},
+		{ETH_RSS_NONFRAG_IPV4_UDP,
+			I40E_FILTER_PCTYPE_NONF_IPV4_UDP},
+		{ETH_RSS_NONFRAG_IPV4_SCTP,
+			I40E_FILTER_PCTYPE_NONF_IPV4_SCTP},
+		{ETH_RSS_NONFRAG_IPV4_OTHER,
+			I40E_FILTER_PCTYPE_NONF_IPV4_OTHER},
+		{ETH_RSS_FRAG_IPV6,
+			I40E_FILTER_PCTYPE_FRAG_IPV6},
+		{ETH_RSS_NONFRAG_IPV6_TCP,
+			I40E_FILTER_PCTYPE_NONF_IPV6_TCP},
+		{ETH_RSS_NONFRAG_IPV6_UDP,
+			I40E_FILTER_PCTYPE_NONF_IPV6_UDP},
+		{ETH_RSS_NONFRAG_IPV6_SCTP,
+			I40E_FILTER_PCTYPE_NONF_IPV6_SCTP},
+		{ETH_RSS_NONFRAG_IPV6_OTHER,
+			I40E_FILTER_PCTYPE_NONF_IPV6_OTHER},
+		{ETH_RSS_L2_PAYLOAD,
+			I40E_FILTER_PCTYPE_L2_PAYLOAD},
+	};
 
 	NEXT_ITEM_OF_ACTION(act, actions, index);
 	rss = act->conf;
@@ -4641,9 +4668,10 @@  i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
 	}
 
 	if (p_info.action_flag) {
-		for (n = 0; n < 64; n++) {
-			if (rss->types & (hf_bit << n)) {
-				conf_info->region[0].hw_flowtype[0] = n;
+		for (j = 0; j < RTE_DIM(pctype_match_table); j++) {
+			if (rss->types & pctype_match_table[j].rss_type) {
+				conf_info->region[0].hw_flowtype[0] =
+					(uint8_t)pctype_match_table[j].pctype;
 				conf_info->region[0].flowtype_num = 1;
 				conf_info->queue_region_number = 1;
 				break;