From patchwork Fri Apr 10 10:18:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simei Su X-Patchwork-Id: 68129 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C826AA059F; Fri, 10 Apr 2020 12:22:08 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 717461C439; Fri, 10 Apr 2020 12:21:43 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id A5EB01C2AA for ; Fri, 10 Apr 2020 12:21:39 +0200 (CEST) IronPort-SDR: sDBo+EjrM7DWObQkzbJ+GEjzbUYkP/PZ0S/Fl2jZY8yi7pg3xAmCylGo9wk/wf473PTBYZbcSg UGGAm0Nfl0wg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Apr 2020 03:21:39 -0700 IronPort-SDR: Qpm6WYccDXePKGP+Hvo7MU61lM+dok1+6PON2sRjY00sG1yQKNjNmm2mG9Xh9cpn4qUakHwuzQ 6L9wA+XHQh2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,366,1580803200"; d="scan'208";a="398880139" Received: from npg-dpdk-cvl-simeisu-118d193.sh.intel.com ([10.67.110.183]) by orsmga004.jf.intel.com with ESMTP; 10 Apr 2020 03:21:37 -0700 From: Simei Su To: qi.z.zhang@intel.com, xiaolong.ye@intel.com, jingjing.wu@intel.com Cc: dev@dpdk.org, yahui.cao@intel.com, simei.su@intel.com Date: Fri, 10 Apr 2020 18:18:24 +0800 Message-Id: <1586513905-437173-5-git-send-email-simei.su@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1586513905-437173-1-git-send-email-simei.su@intel.com> References: <1585834375-157346-1-git-send-email-simei.su@intel.com> <1586513905-437173-1-git-send-email-simei.su@intel.com> Subject: [dpdk-dev] [PATCH v3 4/5] net/iavf: add support for FDIR PFCP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch enables PFCP node and sesssion packets with S_FIELD for flow director filter. Signed-off-by: Simei Su --- drivers/net/iavf/iavf_fdir.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index 58d1821..d57bbf9 100644 --- a/drivers/net/iavf/iavf_fdir.c +++ b/drivers/net/iavf/iavf_fdir.c @@ -92,6 +92,9 @@ IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \ IAVF_INSET_ESP_SPI) +#define IAVF_FDIR_INSET_PFCP (\ + IAVF_INSET_PFCP_S_FIELD) + static struct iavf_pattern_match_item iavf_fdir_pattern[] = { {iavf_pattern_ethertype, IAVF_FDIR_INSET_ETH, IAVF_INSET_NONE}, {iavf_pattern_eth_ipv4, IAVF_FDIR_INSET_ETH_IPV4, IAVF_INSET_NONE}, @@ -112,6 +115,8 @@ {iavf_pattern_eth_ipv6_ah, IAVF_FDIR_INSET_AH, IAVF_INSET_NONE}, {iavf_pattern_eth_ipv4_udp_esp, IAVF_FDIR_INSET_IPV4_NATT_ESP, IAVF_INSET_NONE}, {iavf_pattern_eth_ipv6_udp_esp, IAVF_FDIR_INSET_IPV6_NATT_ESP, IAVF_INSET_NONE}, + {iavf_pattern_eth_ipv4_pfcp, IAVF_FDIR_INSET_PFCP, IAVF_INSET_NONE}, + {iavf_pattern_eth_ipv6_pfcp, IAVF_FDIR_INSET_PFCP, IAVF_INSET_NONE}, }; static struct iavf_flow_parser iavf_fdir_parser; @@ -403,6 +408,7 @@ const struct rte_flow_item_l2tpv3oip *l2tpv3oip_spec, *l2tpv3oip_mask; const struct rte_flow_item_esp *esp_spec, *esp_mask; const struct rte_flow_item_ah *ah_spec, *ah_mask; + const struct rte_flow_item_pfcp *pfcp_spec, *pfcp_mask; uint64_t input_set = IAVF_INSET_NONE; enum rte_flow_item_type next_type; @@ -820,6 +826,27 @@ filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer; break; + case RTE_FLOW_ITEM_TYPE_PFCP: + pfcp_spec = item->spec; + pfcp_mask = item->mask; + + hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer]; + + VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, PFCP); + + if (pfcp_spec && pfcp_mask) { + if (pfcp_mask->s_field == UINT8_MAX) { + input_set |= IAVF_INSET_PFCP_S_FIELD; + VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, PFCP, S_FIELD); + } + + rte_memcpy(hdr->buffer, pfcp_spec, + sizeof(*pfcp_spec)); + } + + filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer; + break; + case RTE_FLOW_ITEM_TYPE_VOID: break;