From patchwork Wed Apr 8 08:29:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Krawczyk X-Patchwork-Id: 67981 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 89FE3A0597; Wed, 8 Apr 2020 10:32:04 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5C62C1C195; Wed, 8 Apr 2020 10:29:50 +0200 (CEST) Received: from mail-lf1-f66.google.com (mail-lf1-f66.google.com [209.85.167.66]) by dpdk.org (Postfix) with ESMTP id 9722F1C11F for ; Wed, 8 Apr 2020 10:29:44 +0200 (CEST) Received: by mail-lf1-f66.google.com with SMTP id l11so4484934lfc.5 for ; Wed, 08 Apr 2020 01:29:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=q07MF4a0VgIpzilsj4Bsf9an7pgFi96nAA2nrlTMNXc=; b=0Sx7zqodRBHWfOcrQL23o/JKtsfcV7QNzQSzeLH4jZwKTQeFKwf0Vc7regTKqGRYT/ YffxnepT657NLvPGtTURTA8wlvSLY4I9aIgYHktKm46QEGmwPEEe5PJLJZPHeLHCnXxQ SoRg0wrYd8khhIGjx1ZcXV5GbJNw14e/YIAHAUKhVu/WlQe0/iOd2ee5vaxOZQl0MQn4 M3xvfJGxaLe5taEgEhpPTMHHy0uJwg1XNW4THt/ItVKhLKjRjb9PTa1H1UQ2Zadn9j73 vyfMw8/uKbCU5IIeuJdRg1/hwmvDrVNuHJwRWarGyx5LjQgnrNmAWaEN0h8QRTRYRc+g 8gGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=q07MF4a0VgIpzilsj4Bsf9an7pgFi96nAA2nrlTMNXc=; b=CWYRi3/lAmmzeDeJe0hRNrj0o5RqWOZyzdkk37WLTiiKBSCLYXzz2E61affjExLqc6 n/GL26Etx3av2R6mBVtHFnHCIAP2i2rMEi3pWrk6wuReChANYln72YzbDPpE9yvj5zf1 TOYVOuTyHEkteoWZKH04AwXOLAnslw7Eidqu2UcKtkrHM5EXtRMkVK4rImGNlkYtMCOJ kaySkraJcWsnsQoY3NwaKj16sGPIJcPjm5QibPtEW2h5UnryyAfnlDR0Bu1VK9pQV1kK rwllU9H5Z48yw5EPps3Iwln/Tef7rK3TS8w+rWvFr85VHM0ML7+NZ+uXGTN26oDmy6Bq YyDg== X-Gm-Message-State: AGi0PuaPMyaFNa+ldh3PKWpnMyf5ApqoInE2o+UEflaYvUuy5XurtP8w GAwcoV7pvORrjILNxl9BNIEXQ5zF4PM= X-Google-Smtp-Source: APiQypKlPCLH/qIMZbIFX7akt9wjzV/SJJJqdJdKZCXEuY3roZ5hvJJ9WgyMRyGCdchWNM8y8x3lLw== X-Received: by 2002:a05:6512:3189:: with SMTP id i9mr3854156lfe.178.1586334583981; Wed, 08 Apr 2020 01:29:43 -0700 (PDT) Received: from mkPC.semihalf.local (193-106-246-138.noc.fibertech.net.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id e8sm765685lja.3.2020.04.08.01.29.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Apr 2020 01:29:43 -0700 (PDT) From: Michal Krawczyk To: dev@dpdk.org Cc: mw@semihalf.com, mba@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com, igorch@amazon.com, ferruh.yigit@intel.com, arybchenko@solarflare.com, Michal Krawczyk Date: Wed, 8 Apr 2020 10:29:06 +0200 Message-Id: <20200408082921.31000-16-mk@semihalf.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200408082921.31000-1-mk@semihalf.com> References: <20200408082921.31000-1-mk@semihalf.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 15/30] net/ena/base: fix indentation of multiple defines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" As the alignemnt of the defines wasn't valid, it was removed at all, so instead of using multiple spaces or tabs, the single space after define name is being used. Signed-off-by: Michal Krawczyk Reviewed-by: Igor Chauskin Reviewed-by: Guy Tzalik --- drivers/net/ena/base/ena_com.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/base/ena_com.h index 6c9943df79..61074eaf63 100644 --- a/drivers/net/ena/base/ena_com.h +++ b/drivers/net/ena/base/ena_com.h @@ -8,9 +8,9 @@ #include "ena_plat.h" -#define ENA_MAX_NUM_IO_QUEUES 128U +#define ENA_MAX_NUM_IO_QUEUES 128U /* We need to queues for each IO (on for Tx and one for Rx) */ -#define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES)) +#define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES)) #define ENA_MAX_HANDLERS 256 @@ -33,9 +33,9 @@ #define ENA_HASH_KEY_SIZE 40 -#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF +#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF -#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1 +#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1 struct ena_llq_configurations { enum ena_admin_llq_header_location llq_header_location;