[v4] net/i40e: enable MAC address as FDIR input set
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Commit Message
FVL enable src MAC address and dst MAC address as FDIR's input set
for ipv4-other, ipv4-udp and ipv4-tcp. When OVS-DPDK is working as
a pure L2 switch, enable MAC address as FDIR input set with Mark+RSS
action would help the performance speed up. And FVL FDIR supports
to change input set with MAC address.
Signed-off-by: Lunyuan Cui <lunyuanx.cui@intel.com>
---
v4:
- Enable MAC address as FDIR's input set for ipv4-udp and ipv4-tcp
v3:
- Enable MAC address as FDIR's input set
v2:
- Enable src MAC address as FDIR's input set
---
doc/guides/rel_notes/release_20_05.rst | 6 ++
drivers/net/i40e/i40e_ethdev.c | 3 +
drivers/net/i40e/i40e_ethdev.h | 9 +-
drivers/net/i40e/i40e_fdir.c | 6 ++
drivers/net/i40e/i40e_flow.c | 131 +++++++++++++++++--------
5 files changed, 114 insertions(+), 41 deletions(-)
Comments
> -----Original Message-----
> From: Cui, LunyuanX <lunyuanx.cui@intel.com>
> Sent: Wednesday, April 1, 2020 3:51 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei <beilei.xing@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>; Cui,
> LunyuanX <lunyuanx.cui@intel.com>
> Subject: [PATCH v4] net/i40e: enable MAC address as FDIR input set
>
> FVL enable src MAC address and dst MAC address as FDIR's input set for
> ipv4-other, ipv4-udp and ipv4-tcp. When OVS-DPDK is working as a pure L2
> switch, enable MAC address as FDIR input set with Mark+RSS action would
> help the performance speed up. And FVL FDIR supports to change input set
> with MAC address.
>
> Signed-off-by: Lunyuan Cui <lunyuanx.cui@intel.com>
>
> ---
> v4:
> - Enable MAC address as FDIR's input set for ipv4-udp and ipv4-tcp
> v3:
> - Enable MAC address as FDIR's input set
> v2:
> - Enable src MAC address as FDIR's input set
> ---
> doc/guides/rel_notes/release_20_05.rst | 6 ++
> drivers/net/i40e/i40e_ethdev.c | 3 +
> drivers/net/i40e/i40e_ethdev.h | 9 +-
> drivers/net/i40e/i40e_fdir.c | 6 ++
> drivers/net/i40e/i40e_flow.c | 131 +++++++++++++++++--------
> 5 files changed, 114 insertions(+), 41 deletions(-)
>
> diff --git a/doc/guides/rel_notes/release_20_05.rst
> b/doc/guides/rel_notes/release_20_05.rst
> index 000bbf501..9e55955c4 100644
> --- a/doc/guides/rel_notes/release_20_05.rst
> +++ b/doc/guides/rel_notes/release_20_05.rst
> @@ -62,6 +62,12 @@ New Features
>
> * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
>
> +* **Updated Intel i40e driver.**
> +
> + Updated i40e PMD with new features and improvements, including:
> +
> + * enable MAC address as FDIR input set for ipv4-other, ipv4-udp and ipv4-
> tcp.
> +
>
> Removed Items
> -------------
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 9539b0470..530908b0e 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -9342,6 +9342,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype
> pctype,
> I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO |
> I40E_INSET_IPV4_TTL,
> [I40E_FILTER_PCTYPE_NONF_IPV4_UDP] =
> + I40E_INSET_DMAC | I40E_INSET_SMAC |
> I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
> I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
> I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | @@ -9357,6
> +9358,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
> I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
> I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
> [I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =
> + I40E_INSET_DMAC | I40E_INSET_SMAC |
> I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
> I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
> I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | @@ -9373,6
> +9375,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
> I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
> I40E_INSET_SCTP_VT,
> [I40E_FILTER_PCTYPE_NONF_IPV4_OTHER] =
> + I40E_INSET_DMAC | I40E_INSET_SMAC |
> I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
> I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
> I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO | diff --git
> a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index
> aac89de91..dbb5d594a 100644
> --- a/drivers/net/i40e/i40e_ethdev.h
> +++ b/drivers/net/i40e/i40e_ethdev.h
> @@ -544,12 +544,19 @@ struct i40e_ipv6_l2tpv3oip_flow {
> uint32_t session_id; /* Session ID in big endian. */ };
>
> +/* A structure used to define the input for l2 dst type flow */ struct
> +i40e_l2_flow {
> + struct rte_ether_addr dst;
> + struct rte_ether_addr src;
> + uint16_t ether_type; /**< Ether type in big endian */
> +};
> +
> /*
> * A union contains the inputs for all types of flow
> * items in flows need to be in big endian
> */
> union i40e_fdir_flow {
> - struct rte_eth_l2_flow l2_flow;
> + struct i40e_l2_flow l2_flow;
> struct rte_eth_udpv4_flow udp4_flow;
> struct rte_eth_tcpv4_flow tcp4_flow;
> struct rte_eth_sctpv4_flow sctp4_flow;
> diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index
> 931f25976..2f24615b6 100644
> --- a/drivers/net/i40e/i40e_fdir.c
> +++ b/drivers/net/i40e/i40e_fdir.c
> @@ -1062,7 +1062,13 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf
> *pf,
> [I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] = IPPROTO_NONE,
> };
>
> + rte_memcpy(raw_pkt, &fdir_input->flow.l2_flow.dst,
> + sizeof(struct rte_ether_addr));
> + rte_memcpy(raw_pkt + sizeof(struct rte_ether_addr),
> + &fdir_input->flow.l2_flow.src,
> + sizeof(struct rte_ether_addr));
Please help to double check if the dst and src need to be swapped refer to the datasheet:
The "source" and "destination" fields in the transmitted packet are
presented in a reversed order with respect to the expected received
packets.
> raw_pkt += 2 * sizeof(struct rte_ether_addr);
> +
> if (vlan && fdir_input->flow_ext.vlan_tci) {
> rte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame));
> rte_memcpy(raw_pkt + sizeof(uint16_t), diff --git
> a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index
> d877ac250..42324b208 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -2626,8 +2626,24 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev
> *dev,
> }
>
> if (eth_spec && eth_mask) {
> - if (!rte_is_zero_ether_addr(ð_mask->src)
> ||
> - !rte_is_zero_ether_addr(ð_mask->dst))
> {
> + if (rte_is_broadcast_ether_addr(ð_mask-
> >dst) &&
> + rte_is_zero_ether_addr(ð_mask-
> >src)) {
> + filter->input.flow.l2_flow.dst =
> + eth_spec->dst;
> + input_set |= I40E_INSET_DMAC;
> + } else if (rte_is_zero_ether_addr(ð_mask-
> >dst) &&
> +
> rte_is_broadcast_ether_addr(ð_mask->src)) {
> + filter->input.flow.l2_flow.src =
> + eth_spec->src;
> + input_set |= I40E_INSET_SMAC;
> + } else if
> (rte_is_broadcast_ether_addr(ð_mask->dst) &&
> +
> rte_is_broadcast_ether_addr(ð_mask->src)) {
> + filter->input.flow.l2_flow.dst =
> + eth_spec->dst;
> + filter->input.flow.l2_flow.src =
> + eth_spec->src;
> + input_set |= (I40E_INSET_DMAC |
> I40E_INSET_SMAC);
> + } else {
> rte_flow_error_set(error, EINVAL,
>
> RTE_FLOW_ERROR_TYPE_ITEM,
> item,
> @@ -2635,7 +2651,8 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev
> *dev,
> return -rte_errno;
> }
> }
> - if (eth_spec && eth_mask && eth_mask->type) {
> + if (eth_spec && eth_mask &&
> + next_type == RTE_FLOW_ITEM_TYPE_END) {
> if (eth_mask->type != RTE_BE16(0xffff)) {
> rte_flow_error_set(error, EINVAL,
>
> RTE_FLOW_ERROR_TYPE_ITEM,
> @@ -2750,21 +2767,33 @@ i40e_flow_parse_fdir_pattern(struct
> rte_eth_dev *dev,
> frag_off & RTE_IPV4_HDR_MF_FLAG)
> pctype =
> I40E_FILTER_PCTYPE_FRAG_IPV4;
>
> - /* Get the filter info */
> - filter->input.flow.ip4_flow.proto =
> - ipv4_spec->hdr.next_proto_id;
> - filter->input.flow.ip4_flow.tos =
> - ipv4_spec->hdr.type_of_service;
> - filter->input.flow.ip4_flow.ttl =
> - ipv4_spec->hdr.time_to_live;
> - filter->input.flow.ip4_flow.src_ip =
> - ipv4_spec->hdr.src_addr;
> - filter->input.flow.ip4_flow.dst_ip =
> - ipv4_spec->hdr.dst_addr;
> -
> - filter->input.flow_ext.inner_ip = false;
> - filter->input.flow_ext.oip_type =
> - I40E_FDIR_IPTYPE_IPV4;
> + if (input_set & (I40E_INSET_DMAC |
> I40E_INSET_SMAC)) {
> + if (input_set & (I40E_INSET_IPV4_SRC
> |
> + I40E_INSET_IPV4_DST |
> I40E_INSET_IPV4_TOS |
> + I40E_INSET_IPV4_TTL |
> I40E_INSET_IPV4_PROTO)) {
> + rte_flow_error_set(error,
> EINVAL,
> +
> RTE_FLOW_ERROR_TYPE_ITEM,
> + item,
> + "Invalid MAC_addr
> mask.");
The error info is not correct. This logic means L2 input set are exclusive with L3 input set, right?
> + return -rte_errno;
> + }
> + } else {
> + /* Get the filter info */
> + filter->input.flow.ip4_flow.proto =
> + ipv4_spec-
> >hdr.next_proto_id;
> + filter->input.flow.ip4_flow.tos =
> + ipv4_spec-
> >hdr.type_of_service;
> + filter->input.flow.ip4_flow.ttl =
> + ipv4_spec->hdr.time_to_live;
> + filter->input.flow.ip4_flow.src_ip =
> + ipv4_spec->hdr.src_addr;
> + filter->input.flow.ip4_flow.dst_ip =
> + ipv4_spec->hdr.dst_addr;
> +
> + filter->input.flow_ext.inner_ip = false;
> + filter->input.flow_ext.oip_type =
> + I40E_FDIR_IPTYPE_IPV4;
> + }
> } else if (!ipv4_spec && !ipv4_mask && !outer_ip) {
> filter->input.flow_ext.inner_ip = true;
> filter->input.flow_ext.iip_type =
> @@ -2894,17 +2923,28 @@ i40e_flow_parse_fdir_pattern(struct
> rte_eth_dev *dev,
> if (tcp_mask->hdr.dst_port == UINT16_MAX)
> input_set |= I40E_INSET_DST_PORT;
>
> - /* Get filter info */
> - if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
> - filter->input.flow.tcp4_flow.src_port
> =
> - tcp_spec->hdr.src_port;
> - filter->input.flow.tcp4_flow.dst_port
> =
> - tcp_spec->hdr.dst_port;
> - } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
> - filter->input.flow.tcp6_flow.src_port
> =
> - tcp_spec->hdr.src_port;
> - filter->input.flow.tcp6_flow.dst_port
> =
> - tcp_spec->hdr.dst_port;
> + if (input_set & (I40E_INSET_DMAC |
> I40E_INSET_SMAC)) {
> + if (input_set &
> + (I40E_INSET_SRC_PORT |
> I40E_INSET_DST_PORT)) {
> + rte_flow_error_set(error,
> EINVAL,
> +
> RTE_FLOW_ERROR_TYPE_ITEM,
> + item,
> + "Invalid MAC_addr
> mask.");
Same comment.
> + return -rte_errno;
> + }
> + } else {
> + /* Get filter info */
> + if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
> {
> + filter-
> >input.flow.tcp4_flow.src_port =
> + tcp_spec-
> >hdr.src_port;
> + filter-
> >input.flow.tcp4_flow.dst_port =
> + tcp_spec-
> >hdr.dst_port;
> + } else if (l3 ==
> RTE_FLOW_ITEM_TYPE_IPV6) {
> + filter-
> >input.flow.tcp6_flow.src_port =
> + tcp_spec-
> >hdr.src_port;
> + filter-
> >input.flow.tcp6_flow.dst_port =
> + tcp_spec-
> >hdr.dst_port;
> + }
> }
> }
>
> @@ -2938,17 +2978,28 @@ i40e_flow_parse_fdir_pattern(struct
> rte_eth_dev *dev,
> if (udp_mask->hdr.dst_port == UINT16_MAX)
> input_set |= I40E_INSET_DST_PORT;
>
> - /* Get filter info */
> - if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
> - filter->input.flow.udp4_flow.src_port
> =
> - udp_spec->hdr.src_port;
> - filter->input.flow.udp4_flow.dst_port
> =
> - udp_spec->hdr.dst_port;
> - } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
> - filter->input.flow.udp6_flow.src_port
> =
> - udp_spec->hdr.src_port;
> - filter->input.flow.udp6_flow.dst_port
> =
> - udp_spec->hdr.dst_port;
> + if (input_set & (I40E_INSET_DMAC |
> I40E_INSET_SMAC)) {
> + if (input_set &
> + (I40E_INSET_SRC_PORT |
> I40E_INSET_DST_PORT)) {
> + rte_flow_error_set(error,
> EINVAL,
> +
> RTE_FLOW_ERROR_TYPE_ITEM,
> + item,
> + "Invalid MAC_addr
> mask.");
Same comment.
> + return -rte_errno;
> + }
> + } else {
> + /* Get filter info */
> + if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
> {
> + filter-
> >input.flow.udp4_flow.src_port =
> + udp_spec-
> >hdr.src_port;
> + filter-
> >input.flow.udp4_flow.dst_port =
> + udp_spec-
> >hdr.dst_port;
> + } else if (l3 ==
> RTE_FLOW_ITEM_TYPE_IPV6) {
> + filter-
> >input.flow.udp6_flow.src_port =
> + udp_spec-
> >hdr.src_port;
> + filter-
> >input.flow.udp6_flow.dst_port =
> + udp_spec-
> >hdr.dst_port;
> + }
> }
> }
> filter->input.flow_ext.is_udp = true;
> --
> 2.17.1
@@ -62,6 +62,12 @@ New Features
* Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
+* **Updated Intel i40e driver.**
+
+ Updated i40e PMD with new features and improvements, including:
+
+ * enable MAC address as FDIR input set for ipv4-other, ipv4-udp and ipv4-tcp.
+
Removed Items
-------------
@@ -9342,6 +9342,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO |
I40E_INSET_IPV4_TTL,
[I40E_FILTER_PCTYPE_NONF_IPV4_UDP] =
+ I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
@@ -9357,6 +9358,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =
+ I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
@@ -9373,6 +9375,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
I40E_INSET_SCTP_VT,
[I40E_FILTER_PCTYPE_NONF_IPV4_OTHER] =
+ I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO |
@@ -544,12 +544,19 @@ struct i40e_ipv6_l2tpv3oip_flow {
uint32_t session_id; /* Session ID in big endian. */
};
+/* A structure used to define the input for l2 dst type flow */
+struct i40e_l2_flow {
+ struct rte_ether_addr dst;
+ struct rte_ether_addr src;
+ uint16_t ether_type; /**< Ether type in big endian */
+};
+
/*
* A union contains the inputs for all types of flow
* items in flows need to be in big endian
*/
union i40e_fdir_flow {
- struct rte_eth_l2_flow l2_flow;
+ struct i40e_l2_flow l2_flow;
struct rte_eth_udpv4_flow udp4_flow;
struct rte_eth_tcpv4_flow tcp4_flow;
struct rte_eth_sctpv4_flow sctp4_flow;
@@ -1062,7 +1062,13 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf,
[I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] = IPPROTO_NONE,
};
+ rte_memcpy(raw_pkt, &fdir_input->flow.l2_flow.dst,
+ sizeof(struct rte_ether_addr));
+ rte_memcpy(raw_pkt + sizeof(struct rte_ether_addr),
+ &fdir_input->flow.l2_flow.src,
+ sizeof(struct rte_ether_addr));
raw_pkt += 2 * sizeof(struct rte_ether_addr);
+
if (vlan && fdir_input->flow_ext.vlan_tci) {
rte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame));
rte_memcpy(raw_pkt + sizeof(uint16_t),
@@ -2626,8 +2626,24 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
}
if (eth_spec && eth_mask) {
- if (!rte_is_zero_ether_addr(ð_mask->src) ||
- !rte_is_zero_ether_addr(ð_mask->dst)) {
+ if (rte_is_broadcast_ether_addr(ð_mask->dst) &&
+ rte_is_zero_ether_addr(ð_mask->src)) {
+ filter->input.flow.l2_flow.dst =
+ eth_spec->dst;
+ input_set |= I40E_INSET_DMAC;
+ } else if (rte_is_zero_ether_addr(ð_mask->dst) &&
+ rte_is_broadcast_ether_addr(ð_mask->src)) {
+ filter->input.flow.l2_flow.src =
+ eth_spec->src;
+ input_set |= I40E_INSET_SMAC;
+ } else if (rte_is_broadcast_ether_addr(ð_mask->dst) &&
+ rte_is_broadcast_ether_addr(ð_mask->src)) {
+ filter->input.flow.l2_flow.dst =
+ eth_spec->dst;
+ filter->input.flow.l2_flow.src =
+ eth_spec->src;
+ input_set |= (I40E_INSET_DMAC | I40E_INSET_SMAC);
+ } else {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ITEM,
item,
@@ -2635,7 +2651,8 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
return -rte_errno;
}
}
- if (eth_spec && eth_mask && eth_mask->type) {
+ if (eth_spec && eth_mask &&
+ next_type == RTE_FLOW_ITEM_TYPE_END) {
if (eth_mask->type != RTE_BE16(0xffff)) {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ITEM,
@@ -2750,21 +2767,33 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
frag_off & RTE_IPV4_HDR_MF_FLAG)
pctype = I40E_FILTER_PCTYPE_FRAG_IPV4;
- /* Get the filter info */
- filter->input.flow.ip4_flow.proto =
- ipv4_spec->hdr.next_proto_id;
- filter->input.flow.ip4_flow.tos =
- ipv4_spec->hdr.type_of_service;
- filter->input.flow.ip4_flow.ttl =
- ipv4_spec->hdr.time_to_live;
- filter->input.flow.ip4_flow.src_ip =
- ipv4_spec->hdr.src_addr;
- filter->input.flow.ip4_flow.dst_ip =
- ipv4_spec->hdr.dst_addr;
-
- filter->input.flow_ext.inner_ip = false;
- filter->input.flow_ext.oip_type =
- I40E_FDIR_IPTYPE_IPV4;
+ if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) {
+ if (input_set & (I40E_INSET_IPV4_SRC |
+ I40E_INSET_IPV4_DST | I40E_INSET_IPV4_TOS |
+ I40E_INSET_IPV4_TTL | I40E_INSET_IPV4_PROTO)) {
+ rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ item,
+ "Invalid MAC_addr mask.");
+ return -rte_errno;
+ }
+ } else {
+ /* Get the filter info */
+ filter->input.flow.ip4_flow.proto =
+ ipv4_spec->hdr.next_proto_id;
+ filter->input.flow.ip4_flow.tos =
+ ipv4_spec->hdr.type_of_service;
+ filter->input.flow.ip4_flow.ttl =
+ ipv4_spec->hdr.time_to_live;
+ filter->input.flow.ip4_flow.src_ip =
+ ipv4_spec->hdr.src_addr;
+ filter->input.flow.ip4_flow.dst_ip =
+ ipv4_spec->hdr.dst_addr;
+
+ filter->input.flow_ext.inner_ip = false;
+ filter->input.flow_ext.oip_type =
+ I40E_FDIR_IPTYPE_IPV4;
+ }
} else if (!ipv4_spec && !ipv4_mask && !outer_ip) {
filter->input.flow_ext.inner_ip = true;
filter->input.flow_ext.iip_type =
@@ -2894,17 +2923,28 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
if (tcp_mask->hdr.dst_port == UINT16_MAX)
input_set |= I40E_INSET_DST_PORT;
- /* Get filter info */
- if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
- filter->input.flow.tcp4_flow.src_port =
- tcp_spec->hdr.src_port;
- filter->input.flow.tcp4_flow.dst_port =
- tcp_spec->hdr.dst_port;
- } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
- filter->input.flow.tcp6_flow.src_port =
- tcp_spec->hdr.src_port;
- filter->input.flow.tcp6_flow.dst_port =
- tcp_spec->hdr.dst_port;
+ if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) {
+ if (input_set &
+ (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) {
+ rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ item,
+ "Invalid MAC_addr mask.");
+ return -rte_errno;
+ }
+ } else {
+ /* Get filter info */
+ if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
+ filter->input.flow.tcp4_flow.src_port =
+ tcp_spec->hdr.src_port;
+ filter->input.flow.tcp4_flow.dst_port =
+ tcp_spec->hdr.dst_port;
+ } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
+ filter->input.flow.tcp6_flow.src_port =
+ tcp_spec->hdr.src_port;
+ filter->input.flow.tcp6_flow.dst_port =
+ tcp_spec->hdr.dst_port;
+ }
}
}
@@ -2938,17 +2978,28 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
if (udp_mask->hdr.dst_port == UINT16_MAX)
input_set |= I40E_INSET_DST_PORT;
- /* Get filter info */
- if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
- filter->input.flow.udp4_flow.src_port =
- udp_spec->hdr.src_port;
- filter->input.flow.udp4_flow.dst_port =
- udp_spec->hdr.dst_port;
- } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
- filter->input.flow.udp6_flow.src_port =
- udp_spec->hdr.src_port;
- filter->input.flow.udp6_flow.dst_port =
- udp_spec->hdr.dst_port;
+ if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) {
+ if (input_set &
+ (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) {
+ rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ item,
+ "Invalid MAC_addr mask.");
+ return -rte_errno;
+ }
+ } else {
+ /* Get filter info */
+ if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
+ filter->input.flow.udp4_flow.src_port =
+ udp_spec->hdr.src_port;
+ filter->input.flow.udp4_flow.dst_port =
+ udp_spec->hdr.dst_port;
+ } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
+ filter->input.flow.udp6_flow.src_port =
+ udp_spec->hdr.src_port;
+ filter->input.flow.udp6_flow.dst_port =
+ udp_spec->hdr.dst_port;
+ }
}
}
filter->input.flow_ext.is_udp = true;