[17/29] net/ena: add support for large LLQ headers
diff mbox series

Message ID 20200327101823.12646-18-mk@semihalf.com
State Superseded, archived
Delegated to: Andrew Rybchenko
Headers show
Series
  • Update ENA driver to v2.1.0
Related show

Checks

Context Check Description
ci/Intel-compilation fail Compilation issues
ci/checkpatch warning coding style issues

Commit Message

Michał Krawczyk March 27, 2020, 10:18 a.m. UTC
If the device supports larger LLQ (Low Latency Queue) headers, the user
can activate them by enabling CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS
flag in the configuration file.

If the device isn't supporting this feature, the default value will be
used.

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
---
 config/common_base           |  1 +
 doc/guides/nics/ena.rst      |  5 +++++
 drivers/net/ena/ena_ethdev.c | 33 ++++++++++++++++++++++++++++++---
 3 files changed, 36 insertions(+), 3 deletions(-)

Comments

Andrew Rybchenko March 27, 2020, 11:20 a.m. UTC | #1
On 3/27/20 1:18 PM, Michal Krawczyk wrote:
> If the device supports larger LLQ (Low Latency Queue) headers, the user
> can activate them by enabling CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS
> flag in the configuration file.
> 
> If the device isn't supporting this feature, the default value will be
> used.
> 
> Signed-off-by: Michal Krawczyk <mk@semihalf.com>
> Reviewed-by: Igor Chauskin <igorch@amazon.com>
> Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
> ---
>  config/common_base           |  1 +
>  doc/guides/nics/ena.rst      |  5 +++++
>  drivers/net/ena/ena_ethdev.c | 33 ++++++++++++++++++++++++++++++---
>  3 files changed, 36 insertions(+), 3 deletions(-)
> 
> diff --git a/config/common_base b/config/common_base
> index c31175f9d6..31f508b3cc 100644
> --- a/config/common_base
> +++ b/config/common_base
> @@ -266,6 +266,7 @@ CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
>  CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
>  CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
>  CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
> +CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS=n

Consider to use device arguments (run-time) to control it.
Build time is bad and you have no it in meson build.
As far as I can see it is control path only and should
not be a problem at all.
Michał Krawczyk March 31, 2020, 9:42 a.m. UTC | #2
pt., 27 mar 2020 o 12:21 Andrew Rybchenko <arybchenko@solarflare.com>
napisał(a):
>
> On 3/27/20 1:18 PM, Michal Krawczyk wrote:
> > If the device supports larger LLQ (Low Latency Queue) headers, the user
> > can activate them by enabling CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS
> > flag in the configuration file.
> >
> > If the device isn't supporting this feature, the default value will be
> > used.
> >
> > Signed-off-by: Michal Krawczyk <mk@semihalf.com>
> > Reviewed-by: Igor Chauskin <igorch@amazon.com>
> > Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
> > ---
> >  config/common_base           |  1 +
> >  doc/guides/nics/ena.rst      |  5 +++++
> >  drivers/net/ena/ena_ethdev.c | 33 ++++++++++++++++++++++++++++++---
> >  3 files changed, 36 insertions(+), 3 deletions(-)
> >
> > diff --git a/config/common_base b/config/common_base
> > index c31175f9d6..31f508b3cc 100644
> > --- a/config/common_base
> > +++ b/config/common_base
> > @@ -266,6 +266,7 @@ CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
> >  CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
> >  CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
> >  CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
> > +CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS=n
>
> Consider to use device arguments (run-time) to control it.
> Build time is bad and you have no it in meson build.
> As far as I can see it is control path only and should
> not be a problem at all.

Thanks for the advice - I'll change that in the v2 version (it is
going to be upstreamed soon).

Patch
diff mbox series

diff --git a/config/common_base b/config/common_base
index c31175f9d6..31f508b3cc 100644
--- a/config/common_base
+++ b/config/common_base
@@ -266,6 +266,7 @@  CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
 CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
 CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
 CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
+CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS=n
 
 #
 # Compile burst-oriented Cisco ENIC PMD driver
diff --git a/doc/guides/nics/ena.rst b/doc/guides/nics/ena.rst
index bbf27f235a..a953068cac 100644
--- a/doc/guides/nics/ena.rst
+++ b/doc/guides/nics/ena.rst
@@ -95,6 +95,11 @@  Configuration information
    * **CONFIG_RTE_LIBRTE_ENA_COM_DEBUG** (default n): Enables or disables debug
      logging of low level tx/rx logic in ena_com(base) within the ENA PMD driver.
 
+   * **CONFIG_RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS** (default n): Enables or
+     disables usage of large LLQ headers. This option will have effect only if
+     the device also supports large LLQ headers. Otherwise, the default value
+     will be used.
+
 **ENA Configuration Parameters**
 
    * **Number of Queues**
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index e1d1a9a7b6..b8bf31be7c 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -894,6 +894,19 @@  ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
 	max_rx_queue_size = rte_align32prevpow2(max_rx_queue_size);
 	max_tx_queue_size = rte_align32prevpow2(max_tx_queue_size);
 
+#ifdef RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS
+	if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) &&
+	    (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)) {
+		max_tx_queue_size /= 2;
+		PMD_INIT_LOG(INFO,
+			"Forcing large headers and decreasing maximum TX queue size to %d\n",
+			max_tx_queue_size);
+	} else {
+		PMD_INIT_LOG(ERR,
+			"Forcing large headers failed: LLQ is disabled or device does not support large headers\n");
+	}
+#endif
+
 	if (unlikely(max_rx_queue_size == 0 || max_tx_queue_size == 0)) {
 		PMD_INIT_LOG(ERR, "Invalid queue size");
 		return -EFAULT;
@@ -1595,14 +1608,28 @@  static void ena_timer_wd_callback(__rte_unused struct rte_timer *timer,
 }
 
 static inline void
-set_default_llq_configurations(struct ena_llq_configurations *llq_config)
+set_default_llq_configurations(struct ena_llq_configurations *llq_config,
+			       struct ena_admin_feature_llq_desc *llq)
 {
 	llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
-	llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
 	llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
 	llq_config->llq_num_decs_before_header =
 		ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
+#ifdef RTE_LIBRTE_ENA_LARGE_LLQ_HEADERS
+	if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B)) {
+		llq_config->llq_ring_entry_size =
+			ENA_ADMIN_LIST_ENTRY_SIZE_256B;
+		llq_config->llq_ring_entry_size_value = 256;
+	} else {
+		llq_config->llq_ring_entry_size =
+			ENA_ADMIN_LIST_ENTRY_SIZE_128B;
+		llq_config->llq_ring_entry_size_value = 128;
+	}
+#else
+	llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
 	llq_config->llq_ring_entry_size_value = 128;
+	RTE_SET_USED(llq);
+#endif
 }
 
 static int
@@ -1749,7 +1776,7 @@  static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
 	}
 	adapter->wd_state = wd_state;
 
-	set_default_llq_configurations(&llq_config);
+	set_default_llq_configurations(&llq_config, &get_feat_ctx.llq);
 	rc = ena_set_queues_placement_policy(adapter, ena_dev,
 					     &get_feat_ctx.llq, &llq_config);
 	if (unlikely(rc)) {