[01/11] net/octeontx2: setup link config based on BP level
diff mbox series

Message ID 20200312111907.31555-2-ndabilpuram@marvell.com
State Superseded, archived
Delegated to: Jerin Jacob
Headers show
Series
  • net/octeontx2: add traffic manager support
Related show

Checks

Context Check Description
ci/Intel-compilation fail Compilation issues
ci/Performance-Testing fail build patch failure
ci/checkpatch success coding style OK

Commit Message

Nithin Dabilpuram March 12, 2020, 11:18 a.m. UTC
Configure NIX_AF_TL3_TL2X_LINKX_CFG using schq at
level based on NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL].

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/net/octeontx2/otx2_ethdev.h |  1 +
 drivers/net/octeontx2/otx2_tm.c     | 16 +++++++++++++++-
 2 files changed, 16 insertions(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index e5684f9..b7d5386 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -304,6 +304,7 @@  struct otx2_eth_dev {
 	/* Contiguous queues */
 	uint16_t txschq_contig_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
 	uint16_t otx2_tm_root_lvl;
+	uint16_t link_cfg_lvl;
 	uint16_t tm_flags;
 	uint16_t tm_leaf_cnt;
 	struct otx2_nix_tm_node_list node_list;
diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
index ba615ce..2364e03 100644
--- a/drivers/net/octeontx2/otx2_tm.c
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -437,6 +437,16 @@  populate_tm_registers(struct otx2_eth_dev *dev,
 		*reg++ = NIX_AF_TL3X_SCHEDULE(schq);
 		*regval++ = (strict_schedul_prio << 24) | rr_quantum;
 		req->num_regs++;
+
+		/* Link configuration */
+		if (!otx2_dev_is_sdp(dev) &&
+		    dev->link_cfg_lvl == NIX_TXSCH_LVL_TL3) {
+			*reg++ = NIX_AF_TL3_TL2X_LINKX_CFG(schq,
+						nix_get_link(dev));
+			*regval++ = BIT_ULL(12) | nix_get_relchan(dev);
+			req->num_regs++;
+		}
+
 		if (pir.rate && pir.burst) {
 			*reg++ = NIX_AF_TL3X_PIR(schq);
 			*regval++ = shaper2regval(&pir) | 1;
@@ -471,7 +481,10 @@  populate_tm_registers(struct otx2_eth_dev *dev,
 		else
 			*regval++ = (strict_schedul_prio << 24) | rr_quantum;
 		req->num_regs++;
-		if (!otx2_dev_is_sdp(dev)) {
+
+		/* Link configuration */
+		if (!otx2_dev_is_sdp(dev) &&
+		    dev->link_cfg_lvl == NIX_TXSCH_LVL_TL2) {
 			*reg++ = NIX_AF_TL3_TL2X_LINKX_CFG(schq,
 						nix_get_link(dev));
 			*regval++ = BIT_ULL(12) | nix_get_relchan(dev);
@@ -1144,6 +1157,7 @@  nix_tm_send_txsch_alloc_msg(struct otx2_eth_dev *dev)
 		return rc;
 
 	nix_tm_copy_rsp_to_dev(dev, rsp);
+	dev->link_cfg_lvl = rsp->link_cfg_lvl;
 
 	nix_tm_assign_hw_id(dev);
 	return 0;