DCF runs as a VF so it can't access PF registers. And export the filter
management list static functions as public for make DCF initialization.
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 7 +++++--
drivers/net/ice/base/ice_common.h | 3 ++-
drivers/net/ice/base/ice_flex_pipe.c | 8 ++++++--
drivers/net/ice/base/ice_type.h | 1 +
4 files changed, 14 insertions(+), 5 deletions(-)
@@ -463,12 +463,13 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
* @hw: pointer to the HW struct
*/
-static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
+enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
struct ice_switch_info *sw;
hw->switch_info = (struct ice_switch_info *)
ice_malloc(hw, sizeof(*hw->switch_info));
+
sw = hw->switch_info;
if (!sw)
@@ -483,7 +484,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
* ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
* @hw: pointer to the HW struct
*/
-static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
{
struct ice_switch_info *sw = hw->switch_info;
struct ice_vsi_list_map_info *v_pos_map;
@@ -1914,6 +1915,8 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
dev_p->num_flow_director_fltr);
}
if (func_p) {
+ if (hw->dcf_enabled)
+ break;
reg_val = rd32(hw, GLQF_FD_SIZE);
val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
GLQF_FD_SIZE_FD_GSIZE_S;
@@ -19,7 +19,8 @@ enum ice_fw_modes {
};
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
-
+enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw);
+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);
enum ice_status ice_init_hw(struct ice_hw *hw);
void ice_deinit_hw(struct ice_hw *hw);
enum ice_status
@@ -1253,6 +1253,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
#define ICE_SW_BLK_INP_MASK_L 0xFFFFFFFF
#define ICE_SW_BLK_INP_MASK_H 0x0000FFFF
#define ICE_SW_BLK_IDX 0
+ if (hw->dcf_enabled)
+ return;
/* setup Switch block input mask, which is 48-bits in two parts */
wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
@@ -3600,7 +3602,8 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, r);
}
ice_destroy_lock(&hw->rss_locks);
- ice_shutdown_all_prof_masks(hw);
+ if (!hw->dcf_enabled)
+ ice_shutdown_all_prof_masks(hw);
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
}
@@ -3680,7 +3683,8 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
ice_init_lock(&hw->rss_locks);
INIT_LIST_HEAD(&hw->rss_list_head);
- ice_init_all_prof_masks(hw);
+ if (!hw->dcf_enabled)
+ ice_init_all_prof_masks(hw);
for (i = 0; i < ICE_BLK_COUNT; i++) {
struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
struct ice_prof_tcam *prof = &hw->blk[i].prof;
@@ -822,6 +822,7 @@ struct ice_hw {
int (*aq_send_cmd_fn)(void *param, struct ice_aq_desc *desc,
void *buf, u16 buf_size);
void *aq_send_cmd_param;
+ u8 dcf_enabled; /* Device Config Function */
u8 api_branch; /* API branch version */
u8 api_maj_ver; /* API major version */