From patchwork Wed Feb 26 08:27:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 66046 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 94A59A055E; Wed, 26 Feb 2020 09:27:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5B0571BFAB; Wed, 26 Feb 2020 09:27:56 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 39707B62 for ; Wed, 26 Feb 2020 09:27:54 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@mellanox.com) with ESMTPS (AES256-SHA encrypted); 26 Feb 2020 10:27:53 +0200 Received: from localhost.localdomain (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 01Q8RrZD017946; Wed, 26 Feb 2020 10:27:53 +0200 Received: from pegasus05.mtr.labs.mlnx (localhost [127.0.0.1]) by localhost.localdomain (8.14.7/8.14.7) with ESMTP id 01Q8RrfO018491; Wed, 26 Feb 2020 08:27:53 GMT Received: (from root@localhost) by pegasus05.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 01Q8Rq7T018490; Wed, 26 Feb 2020 08:27:52 GMT From: Ophir Munk To: dev@dpdk.org Cc: Thomas Monjalon , Raslan Darawsheh , Ophir Munk Date: Wed, 26 Feb 2020 08:27:48 +0000 Message-Id: <20200226082748.18445-1-ophirmu@mellanox.com> X-Mailer: git-send-email 2.8.4 Subject: [dpdk-dev] [PATCH v1] net/mlx5: fix VLAN PCP item calculation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The VLAN 16 bits tci field contains both values of PCP and VID. When extracting any one of them - it is required not to affect the other one. Previous to this commit in routine flow_dev_get_vlan_info_from_items() we calcualted the PCP as follows: (1) vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK; (2) vlan->vlan_tci |= <3 bits value of PCP> In line (1) we should have used the negated mask ('~' operator) such that only the PCP bits will be nullified before ORing them with the updated PCP value. Fixes: 9aee7a8418 ("net/mlx5: support push flow action on VLAN header") Signed-off-by: Ophir Munk Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow_dv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 06592b5..2414a97 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1771,7 +1771,7 @@ flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items, /* Only full match values are accepted */ if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) == MLX5DV_FLOW_VLAN_PCP_MASK_BE) { - vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK; + vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK; vlan->vlan_tci |= rte_be_to_cpu_16(vlan_v->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE);