[v1,1/1] net/octeontx2: fix flow control initial state
diff mbox series

Message ID 20200206042713.6761-1-vattunuru@marvell.com
State Accepted, archived
Delegated to: Jerin Jacob
Headers show
Series
  • [v1,1/1] net/octeontx2: fix flow control initial state
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Checks

Context Check Description
ci/Intel-compilation fail apply issues
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS
ci/iol-nxp-Performance success Performance Testing PASS
ci/checkpatch success coding style OK

Commit Message

Vamsi Krishna Attunuru Feb. 6, 2020, 4:27 a.m. UTC
From: Vamsi Attunuru <vattunuru@marvell.com>

Currently when application requests for RTE_FC_NONE earlier
than PMD's internal fc mode update, flow control set routine
is returning without updating the flow control state.

Patch updates the PMD's internal fc mode details during
dev_configure to ensure any flow control set requests
issued later are handled properly.

Fixes: 609945f1ce90 ("net/octeontx2: support flow control")
Cc: stable@dpdk.org

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
---
 drivers/net/octeontx2/otx2_ethdev.c    |  6 ++++++
 drivers/net/octeontx2/otx2_ethdev.h    |  2 ++
 drivers/net/octeontx2/otx2_flow_ctrl.c | 35 ++++++++++++++++++++++++++++++----
 3 files changed, 39 insertions(+), 4 deletions(-)

Comments

Jerin Jacob Feb. 15, 2020, 9:24 a.m. UTC | #1
On Thu, Feb 6, 2020 at 9:57 AM <vattunuru@marvell.com> wrote:
>
> From: Vamsi Attunuru <vattunuru@marvell.com>
>
> Currently when application requests for RTE_FC_NONE earlier
> than PMD's internal fc mode update, flow control set routine
> is returning without updating the flow control state.
>
> Patch updates the PMD's internal fc mode details during
> dev_configure to ensure any flow control set requests
> issued later are handled properly.
>
> Fixes: 609945f1ce90 ("net/octeontx2: support flow control")
> Cc: stable@dpdk.org
>
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> ---
>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/master. Thanks

Patch
diff mbox series

diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index 1ec234b..25b1c5c 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1727,6 +1727,12 @@  otx2_nix_configure(struct rte_eth_dev *eth_dev)
 		goto cq_fini;
 	}
 
+	rc = otx2_nix_flow_ctrl_init(eth_dev);
+	if (rc) {
+		otx2_err("Failed to init flow ctrl mode %d", rc);
+		goto cq_fini;
+	}
+
 	rc = otx2_nix_mc_addr_list_install(eth_dev);
 	if (rc < 0) {
 		otx2_err("Failed to install mc address list rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index 49fed95..4b3ad95 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -509,6 +509,8 @@  int otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev,
 			  struct rte_ether_addr *addr);
 
 /* Flow Control */
+int otx2_nix_flow_ctrl_init(struct rte_eth_dev *eth_dev);
+
 int otx2_nix_flow_ctrl_get(struct rte_eth_dev *eth_dev,
 			   struct rte_eth_fc_conf *fc_conf);
 
diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c b/drivers/net/octeontx2/otx2_flow_ctrl.c
index 1c6929e..76bf481 100644
--- a/drivers/net/octeontx2/otx2_flow_ctrl.c
+++ b/drivers/net/octeontx2/otx2_flow_ctrl.c
@@ -200,16 +200,14 @@  int
 otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)
 {
 	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+	struct otx2_fc_info *fc = &dev->fc_info;
 	struct rte_eth_fc_conf fc_conf;
 
 	if (otx2_dev_is_lbk(dev) || otx2_dev_is_sdp(dev))
 		return 0;
 
 	memset(&fc_conf, 0, sizeof(struct rte_eth_fc_conf));
-	/* Both Rx & Tx flow ctrl get enabled(RTE_FC_FULL) in HW
-	 * by AF driver, update those info in PMD structure.
-	 */
-	otx2_nix_flow_ctrl_get(eth_dev, &fc_conf);
+	fc_conf.mode = fc->mode;
 
 	/* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
 	if (otx2_dev_is_Ax(dev) &&
@@ -223,3 +221,32 @@  otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)
 
 	return otx2_nix_flow_ctrl_set(eth_dev, &fc_conf);
 }
+
+int
+otx2_nix_flow_ctrl_init(struct rte_eth_dev *eth_dev)
+{
+	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+	struct otx2_fc_info *fc = &dev->fc_info;
+	struct rte_eth_fc_conf fc_conf;
+	int rc;
+
+	if (otx2_dev_is_lbk(dev) || otx2_dev_is_sdp(dev))
+		return 0;
+
+	memset(&fc_conf, 0, sizeof(struct rte_eth_fc_conf));
+	/* Both Rx & Tx flow ctrl get enabled(RTE_FC_FULL) in HW
+	 * by AF driver, update those info in PMD structure.
+	 */
+	rc = otx2_nix_flow_ctrl_get(eth_dev, &fc_conf);
+	if (rc)
+		goto exit;
+
+	fc->mode = fc_conf.mode;
+	fc->rx_pause = (fc_conf.mode == RTE_FC_FULL) ||
+			(fc_conf.mode == RTE_FC_RX_PAUSE);
+	fc->tx_pause = (fc_conf.mode == RTE_FC_FULL) ||
+			(fc_conf.mode == RTE_FC_TX_PAUSE);
+
+exit:
+	return rc;
+}