From patchwork Tue Jan 28 16:27:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matan Azrad X-Patchwork-Id: 65257 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6048CA04B3; Tue, 28 Jan 2020 17:30:24 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AA06D1D440; Tue, 28 Jan 2020 17:28:22 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 09F511D168 for ; Tue, 28 Jan 2020 17:28:02 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from asafp@mellanox.com) with ESMTPS (AES256-SHA encrypted); 28 Jan 2020 18:27:59 +0200 Received: from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx [10.210.16.112]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 00SIOulV013316; Tue, 28 Jan 2020 20:25:12 +0200 From: Matan Azrad To: dev@dpdk.org, Viacheslav Ovsiienko Cc: Raslan Darawsheh Date: Tue, 28 Jan 2020 16:27:27 +0000 Message-Id: <1580228860-10665-13-git-send-email-matan@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1580228860-10665-1-git-send-email-matan@mellanox.com> References: <1580205965-21492-1-git-send-email-matan@mellanox.com> <1580228860-10665-1-git-send-email-matan@mellanox.com> Subject: [dpdk-dev] [PATCH v3 12/25] common/mlx5: glue UAR allocation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The isolated, protected and independent direct access to the HW by multiple processes is implemented via User Access Region (UAR) mechanism. The UAR is part of PCI address space that is mapped for direct access to the HW from the CPU. UAR is comprised of multiple pages, each page containing registers that control the HW operation. UAR mechanism is used to post execution or control requests to the HW. It is used by the HW to enforce protection and isolation between different processes. Add a glue command to allocate and free an UAR. Signed-off-by: Matan Azrad Acked-by: Viacheslav Ovsiienko --- drivers/common/mlx5/mlx5_glue.c | 25 +++++++++++++++++++++++++ drivers/common/mlx5/mlx5_glue.h | 4 ++++ 2 files changed, 29 insertions(+) diff --git a/drivers/common/mlx5/mlx5_glue.c b/drivers/common/mlx5/mlx5_glue.c index e4eabdb..5691636 100644 --- a/drivers/common/mlx5/mlx5_glue.c +++ b/drivers/common/mlx5/mlx5_glue.c @@ -1137,6 +1137,29 @@ #endif } +static struct mlx5dv_devx_uar * +mlx5_glue_devx_alloc_uar(struct ibv_context *context, uint32_t flags) +{ +#ifdef HAVE_IBV_DEVX_OBJ + return mlx5dv_devx_alloc_uar(context, flags); +#else + (void)context; + (void)flags; + errno = ENOTSUP; + return NULL; +#endif +} + +static void +mlx5_glue_devx_free_uar(struct mlx5dv_devx_uar *devx_uar) +{ +#ifdef HAVE_IBV_DEVX_OBJ + mlx5dv_devx_free_uar(devx_uar); +#else + (void)devx_uar; +#endif +} + alignas(RTE_CACHE_LINE_SIZE) const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){ .version = MLX5_GLUE_VERSION, @@ -1242,4 +1265,6 @@ .devx_subscribe_devx_event = mlx5_glue_devx_subscribe_devx_event, .devx_subscribe_devx_event_fd = mlx5_glue_devx_subscribe_devx_event_fd, .devx_get_event = mlx5_glue_devx_get_event, + .devx_alloc_uar = mlx5_glue_devx_alloc_uar, + .devx_free_uar = mlx5_glue_devx_free_uar, }; diff --git a/drivers/common/mlx5/mlx5_glue.h b/drivers/common/mlx5/mlx5_glue.h index 6fc00dd..7d9256e 100644 --- a/drivers/common/mlx5/mlx5_glue.h +++ b/drivers/common/mlx5/mlx5_glue.h @@ -66,6 +66,7 @@ #ifndef HAVE_IBV_DEVX_OBJ struct mlx5dv_devx_obj; struct mlx5dv_devx_umem { uint32_t umem_id; }; +struct mlx5dv_devx_uar { void *reg_addr; void *base_addr; uint32_t page_id; }; #endif #ifndef HAVE_IBV_DEVX_ASYNC @@ -230,6 +231,9 @@ struct mlx5_glue { int (*dv_destroy_flow)(void *flow); int (*dv_destroy_flow_matcher)(void *matcher); struct ibv_context *(*dv_open_device)(struct ibv_device *device); + struct mlx5dv_devx_uar *(*devx_alloc_uar)(struct ibv_context *context, + uint32_t flags); + void (*devx_free_uar)(struct mlx5dv_devx_uar *devx_uar); struct mlx5dv_devx_obj *(*devx_obj_create) (struct ibv_context *ctx, const void *in, size_t inlen,