From patchwork Thu Jan 23 14:25:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Kozyrev X-Patchwork-Id: 65084 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id D6A5AA053A; Thu, 23 Jan 2020 15:26:28 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CB97D1B203; Thu, 23 Jan 2020 15:26:11 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 5AF8A49E0 for ; Thu, 23 Jan 2020 15:26:07 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from akozyrev@mellanox.com) with ESMTPS (AES256-SHA encrypted); 23 Jan 2020 16:26:02 +0200 Received: from pegasus02.mtr.labs.mlnx. (pegasus02.mtr.labs.mlnx [10.210.16.122]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 00NEQ1X6024012; Thu, 23 Jan 2020 16:26:02 +0200 From: Alexander Kozyrev To: dev@dpdk.org Cc: rasland@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, ferruh.yigit@intel.com, thomas@monjalon.net Date: Thu, 23 Jan 2020 16:25:53 +0200 Message-Id: <1579789555-23239-4-git-send-email-akozyrev@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1579789555-23239-1-git-send-email-akozyrev@mellanox.com> References: <1579789555-23239-1-git-send-email-akozyrev@mellanox.com> Subject: [dpdk-dev] [PATCH 3/5] net/mlx4: introduce the mlx4 version of the assert X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use the MLX4_ASSERT macros instead of the standard assert clause. Depends on the MLX4_DEBUG configuration option to define it as the RTE_ASSERT or an empty clause for a release configuration. Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx4/mlx4.c | 25 ++++++++--------- drivers/net/mlx4/mlx4_ethdev.c | 5 ++-- drivers/net/mlx4/mlx4_flow.c | 34 +++++++++++------------ drivers/net/mlx4/mlx4_intr.c | 3 +- drivers/net/mlx4/mlx4_mp.c | 25 ++++++++--------- drivers/net/mlx4/mlx4_mr.c | 62 +++++++++++++++++++++--------------------- drivers/net/mlx4/mlx4_rxq.c | 53 ++++++++++++++++++------------------ drivers/net/mlx4/mlx4_rxtx.c | 17 ++++++------ drivers/net/mlx4/mlx4_txq.c | 17 ++++++------ drivers/net/mlx4/mlx4_utils.c | 3 +- drivers/net/mlx4/mlx4_utils.h | 7 +++-- 11 files changed, 122 insertions(+), 129 deletions(-) diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index e37ae23..00d4dc4 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -8,7 +8,6 @@ * mlx4 driver initialization. */ -#include #include #include #include @@ -162,7 +161,7 @@ struct mlx4_conf { socket = rxq->socket; } - assert(data != NULL); + MLX4_ASSERT(data != NULL); ret = rte_malloc_socket(__func__, size, alignment, socket); if (!ret && size) rte_errno = ENOMEM; @@ -180,7 +179,7 @@ struct mlx4_conf { static void mlx4_free_verbs_buf(void *ptr, void *data __rte_unused) { - assert(data != NULL); + MLX4_ASSERT(data != NULL); rte_free(ptr); } #endif @@ -392,11 +391,11 @@ struct mlx4_conf { mlx4_proc_priv_uninit(dev); mlx4_mr_release(dev); if (priv->pd != NULL) { - assert(priv->ctx != NULL); + MLX4_ASSERT(priv->ctx != NULL); claim_zero(mlx4_glue->dealloc_pd(priv->pd)); claim_zero(mlx4_glue->close_device(priv->ctx)); } else - assert(priv->ctx == NULL); + MLX4_ASSERT(priv->ctx == NULL); mlx4_intr_uninstall(priv); memset(priv, 0, sizeof(*priv)); } @@ -705,7 +704,7 @@ struct mlx4_conf { if (mlx4_init_shared_data()) return -rte_errno; sd = mlx4_shared_data; - assert(sd); + MLX4_ASSERT(sd); rte_spinlock_lock(&sd->lock); switch (rte_eal_process_type()) { case RTE_PROC_PRIMARY: @@ -775,16 +774,16 @@ struct mlx4_conf { strerror(rte_errno)); return -rte_errno; } - assert(pci_drv == &mlx4_driver); + MLX4_ASSERT(pci_drv == &mlx4_driver); list = mlx4_glue->get_device_list(&i); if (list == NULL) { rte_errno = errno; - assert(rte_errno); + MLX4_ASSERT(rte_errno); if (rte_errno == ENOSYS) ERROR("cannot list devices, is ib_uverbs loaded?"); return -rte_errno; } - assert(i >= 0); + MLX4_ASSERT(i >= 0); /* * For each listed device, check related sysfs entry against * the provided PCI ID. @@ -821,7 +820,7 @@ struct mlx4_conf { ERROR("cannot use device, are drivers up to date?"); return -rte_errno; } - assert(err > 0); + MLX4_ASSERT(err > 0); rte_errno = err; return -rte_errno; } @@ -846,7 +845,7 @@ struct mlx4_conf { err = ENODEV; goto error; } - assert(device_attr.max_sge >= MLX4_MAX_SGE); + MLX4_ASSERT(device_attr.max_sge >= MLX4_MAX_SGE); for (i = 0; i < device_attr.phys_port_cnt; i++) { uint32_t port = i + 1; /* ports are indexed from one */ struct ibv_context *ctx = NULL; @@ -1303,7 +1302,7 @@ struct mlx4_conf { #ifdef RTE_IBVERBS_LINK_DLOPEN if (mlx4_glue_init()) return; - assert(mlx4_glue); + MLX4_ASSERT(mlx4_glue); #endif #ifdef MLX4_DEBUG /* Glue structure must not contain any NULL pointers. */ @@ -1311,7 +1310,7 @@ struct mlx4_conf { unsigned int i; for (i = 0; i != sizeof(*mlx4_glue) / sizeof(void *); ++i) - assert(((const void *const *)mlx4_glue)[i]); + MLX4_ASSERT(((const void *const *)mlx4_glue)[i]); } #endif if (strcmp(mlx4_glue->version, MLX4_GLUE_VERSION)) { diff --git a/drivers/net/mlx4/mlx4_ethdev.c b/drivers/net/mlx4/mlx4_ethdev.c index dfb24c2..e500ec4 100644 --- a/drivers/net/mlx4/mlx4_ethdev.c +++ b/drivers/net/mlx4/mlx4_ethdev.c @@ -8,7 +8,6 @@ * Miscellaneous control operations for mlx4 driver. */ -#include #include #include #include @@ -874,7 +873,7 @@ int mlx4_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size) fc_conf->mode = RTE_FC_NONE; ret = 0; out: - assert(ret >= 0); + MLX4_ASSERT(ret >= 0); return -ret; } @@ -920,7 +919,7 @@ int mlx4_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size) } ret = 0; out: - assert(ret >= 0); + MLX4_ASSERT(ret >= 0); return -ret; } diff --git a/drivers/net/mlx4/mlx4_flow.c b/drivers/net/mlx4/mlx4_flow.c index 96479b8..793f0b0 100644 --- a/drivers/net/mlx4/mlx4_flow.c +++ b/drivers/net/mlx4/mlx4_flow.c @@ -9,7 +9,6 @@ */ #include -#include #include #include #include @@ -547,7 +546,7 @@ struct mlx4_drop { mask = item->mask ? (const uint8_t *)item->mask : (const uint8_t *)proc->mask_default; - assert(mask); + MLX4_ASSERT(mask); /* * Single-pass check to make sure that: * - Mask is supported, no bits are set outside proc->mask_support. @@ -954,8 +953,8 @@ struct mlx4_drop { struct mlx4_drop *drop = priv->drop; if (drop) { - assert(drop->refcnt); - assert(drop->priv == priv); + MLX4_ASSERT(drop->refcnt); + MLX4_ASSERT(drop->priv == priv); ++drop->refcnt; return drop; } @@ -1000,7 +999,7 @@ struct mlx4_drop { static void mlx4_drop_put(struct mlx4_drop *drop) { - assert(drop->refcnt); + MLX4_ASSERT(drop->refcnt); if (--drop->refcnt) return; drop->priv->drop = NULL; @@ -1045,7 +1044,7 @@ struct mlx4_drop { mlx4_rss_detach(flow->rss); return 0; } - assert(flow->ibv_attr); + MLX4_ASSERT(flow->ibv_attr); if (!flow->internal && !priv->isolated && flow->ibv_attr->priority == MLX4_FLOW_PRIORITY_LAST) { @@ -1111,7 +1110,7 @@ struct mlx4_drop { } qp = priv->drop->qp; } - assert(qp); + MLX4_ASSERT(qp); if (flow->ibv_flow) return 0; flow->ibv_flow = mlx4_glue->create_flow(qp, flow->ibv_attr); @@ -1411,10 +1410,11 @@ struct mlx4_drop { if (!flow->mac) continue; - assert(flow->ibv_attr->type == IBV_FLOW_ATTR_NORMAL); - assert(flow->ibv_attr->num_of_specs == 1); - assert(eth->type == IBV_FLOW_SPEC_ETH); - assert(flow->rss); + MLX4_ASSERT(flow->ibv_attr->type == + IBV_FLOW_ATTR_NORMAL); + MLX4_ASSERT(flow->ibv_attr->num_of_specs == 1); + MLX4_ASSERT(eth->type == IBV_FLOW_SPEC_ETH); + MLX4_ASSERT(flow->rss); if (rule_vlan && (eth->val.vlan_tag != *rule_vlan || eth->mask.vlan_tag != RTE_BE16(0x0fff))) @@ -1463,13 +1463,13 @@ struct mlx4_drop { if (flow->promisc) break; } else { - assert(ETH_DEV(priv)->data->all_multicast); + MLX4_ASSERT(ETH_DEV(priv)->data->all_multicast); if (flow->allmulti) break; } } if (flow && flow->internal) { - assert(flow->rss); + MLX4_ASSERT(flow->rss); if (flow->rss->queues != queues || memcmp(flow->rss->queue_id, action_rss.queue, queues * sizeof(flow->rss->queue_id[0]))) @@ -1481,7 +1481,7 @@ struct mlx4_drop { pattern[1].spec = NULL; pattern[1].mask = NULL; } else { - assert(ETH_DEV(priv)->data->all_multicast); + MLX4_ASSERT(ETH_DEV(priv)->data->all_multicast); pattern[1].spec = ð_allmulti; pattern[1].mask = ð_allmulti; } @@ -1493,7 +1493,7 @@ struct mlx4_drop { goto error; } } - assert(flow->promisc || flow->allmulti); + MLX4_ASSERT(flow->promisc || flow->allmulti); flow->select = 1; } error: @@ -1557,7 +1557,7 @@ struct mlx4_drop { return ret; } if (!priv->started) - assert(!priv->drop); + MLX4_ASSERT(!priv->drop); return 0; } @@ -1577,7 +1577,7 @@ struct mlx4_drop { while ((flow = LIST_FIRST(&priv->flows))) mlx4_flow_destroy(ETH_DEV(priv), flow, NULL); - assert(LIST_EMPTY(&priv->rss)); + MLX4_ASSERT(LIST_EMPTY(&priv->rss)); } static const struct rte_flow_ops mlx4_flow_ops = { diff --git a/drivers/net/mlx4/mlx4_intr.c b/drivers/net/mlx4/mlx4_intr.c index 4f33526..020fc25 100644 --- a/drivers/net/mlx4/mlx4_intr.c +++ b/drivers/net/mlx4/mlx4_intr.c @@ -8,7 +8,6 @@ * Interrupts handling for mlx4 driver. */ -#include #include #include #include @@ -122,7 +121,7 @@ const struct rte_intr_conf *const intr_conf = Ð_DEV(priv)->data->dev_conf.intr_conf; - assert(priv->intr_alarm == 1); + MLX4_ASSERT(priv->intr_alarm == 1); priv->intr_alarm = 0; if (intr_conf->lsc && !mlx4_link_status_check(priv)) _rte_eth_dev_callback_process(ETH_DEV(priv), diff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c index cdb6485..eca0c20 100644 --- a/drivers/net/mlx4/mlx4_mp.c +++ b/drivers/net/mlx4/mlx4_mp.c @@ -3,7 +3,6 @@ * Copyright 2019 Mellanox Technologies, Ltd */ -#include #include #include @@ -62,7 +61,7 @@ uint32_t lkey; int ret; - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); if (!rte_eth_dev_is_valid_port(param->port_id)) { rte_errno = ENODEV; ERROR("port %u invalid port ID", param->port_id); @@ -114,7 +113,7 @@ struct rte_eth_dev *dev; int ret; - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); if (!rte_eth_dev_is_valid_port(param->port_id)) { rte_errno = ENODEV; ERROR("port %u invalid port ID", param->port_id); @@ -167,7 +166,7 @@ int ret; int i; - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); if (!mlx4_shared_data->secondary_cnt) return; if (type != MLX4_MP_REQ_START_RXTX && type != MLX4_MP_REQ_STOP_RXTX) { @@ -249,7 +248,7 @@ struct timespec ts = {.tv_sec = MLX4_MP_REQ_TIMEOUT_SEC, .tv_nsec = 0}; int ret; - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); mp_init_msg(dev, &mp_req, MLX4_MP_REQ_CREATE_MR); req->args.addr = addr; ret = rte_mp_request_sync(&mp_req, &mp_rep, &ts); @@ -258,7 +257,7 @@ dev->data->port_id); return -rte_errno; } - assert(mp_rep.nb_received == 1); + MLX4_ASSERT(mp_rep.nb_received == 1); mp_res = &mp_rep.msgs[0]; res = (struct mlx4_mp_param *)mp_res->param; ret = res->result; @@ -287,7 +286,7 @@ struct timespec ts = {.tv_sec = MLX4_MP_REQ_TIMEOUT_SEC, .tv_nsec = 0}; int ret; - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); mp_init_msg(dev, &mp_req, MLX4_MP_REQ_VERBS_CMD_FD); ret = rte_mp_request_sync(&mp_req, &mp_rep, &ts); if (ret) { @@ -295,7 +294,7 @@ dev->data->port_id); return -rte_errno; } - assert(mp_rep.nb_received == 1); + MLX4_ASSERT(mp_rep.nb_received == 1); mp_res = &mp_rep.msgs[0]; res = (struct mlx4_mp_param *)mp_res->param; if (res->result) { @@ -305,7 +304,7 @@ ret = -rte_errno; goto exit; } - assert(mp_res->num_fds == 1); + MLX4_ASSERT(mp_res->num_fds == 1); ret = mp_res->fds[0]; DEBUG("port %u command FD from primary is %d", dev->data->port_id, ret); @@ -322,7 +321,7 @@ { int ret; - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); /* primary is allowed to not support IPC */ ret = rte_mp_action_register(MLX4_MP_NAME, mp_primary_handle); @@ -337,7 +336,7 @@ void mlx4_mp_uninit_primary(void) { - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); rte_mp_action_unregister(MLX4_MP_NAME); } @@ -347,7 +346,7 @@ int mlx4_mp_init_secondary(void) { - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); return rte_mp_action_register(MLX4_MP_NAME, mp_secondary_handle); } @@ -357,6 +356,6 @@ void mlx4_mp_uninit_secondary(void) { - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); rte_mp_action_unregister(MLX4_MP_NAME); } diff --git a/drivers/net/mlx4/mlx4_mr.c b/drivers/net/mlx4/mlx4_mr.c index 069a450..44fbe6c 100644 --- a/drivers/net/mlx4/mlx4_mr.c +++ b/drivers/net/mlx4/mlx4_mr.c @@ -8,7 +8,6 @@ * Memory management functions for mlx4 driver. */ -#include #include #include #include @@ -113,11 +112,11 @@ struct mr_update_mp_data { uint16_t n; uint16_t base = 0; - assert(bt != NULL); + MLX4_ASSERT(bt != NULL); lkp_tbl = *bt->table; n = bt->len; /* First entry must be NULL for comparison. */ - assert(bt->len > 0 || (lkp_tbl[0].start == 0 && + MLX4_ASSERT(bt->len > 0 || (lkp_tbl[0].start == 0 && lkp_tbl[0].lkey == UINT32_MAX)); /* Binary search. */ do { @@ -130,7 +129,7 @@ struct mr_update_mp_data { n -= delta; } } while (n > 1); - assert(addr >= lkp_tbl[base].start); + MLX4_ASSERT(addr >= lkp_tbl[base].start); *idx = base; if (addr < lkp_tbl[base].end) return lkp_tbl[base].lkey; @@ -156,9 +155,9 @@ struct mr_update_mp_data { uint16_t idx = 0; size_t shift; - assert(bt != NULL); - assert(bt->len <= bt->size); - assert(bt->len > 0); + MLX4_ASSERT(bt != NULL); + MLX4_ASSERT(bt->len <= bt->size); + MLX4_ASSERT(bt->len > 0); lkp_tbl = *bt->table; /* Find out the slot for insertion. */ if (mr_btree_lookup(bt, &idx, entry->start) != UINT32_MAX) { @@ -294,9 +293,9 @@ struct mr_update_mp_data { if (mr->msl == NULL) { struct ibv_mr *ibv_mr = mr->ibv_mr; - assert(mr->ms_bmp_n == 1); - assert(mr->ms_n == 1); - assert(base_idx == 0); + MLX4_ASSERT(mr->ms_bmp_n == 1); + MLX4_ASSERT(mr->ms_n == 1); + MLX4_ASSERT(base_idx == 0); /* * Can't search it from memseg list but get it directly from * verbs MR as there's only one chunk. @@ -315,7 +314,7 @@ struct mr_update_mp_data { msl = mr->msl; ms = rte_fbarray_get(&msl->memseg_arr, mr->ms_base_idx + idx); - assert(msl->page_sz == ms->hugepage_sz); + MLX4_ASSERT(msl->page_sz == ms->hugepage_sz); if (!start) start = ms->addr_64; end = ms->addr_64 + ms->hugepage_sz; @@ -452,7 +451,7 @@ struct mr_update_mp_data { if (mr != NULL) lkey = entry->lkey; } - assert(lkey == UINT32_MAX || (addr >= entry->start && + MLX4_ASSERT(lkey == UINT32_MAX || (addr >= entry->start && addr < entry->end)); return lkey; } @@ -491,7 +490,7 @@ struct mr_update_mp_data { struct mlx4_mr_list free_list = LIST_HEAD_INITIALIZER(free_list); /* Must be called from the primary process. */ - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); /* * MR can't be freed with holding the lock because rte_free() could call * memory free callback function. This will be a deadlock situation. @@ -564,7 +563,7 @@ struct mr_update_mp_data { /* Fill in output data. */ mr_lookup_dev(dev, entry, addr); /* Lookup can't fail. */ - assert(entry->lkey != UINT32_MAX); + MLX4_ASSERT(entry->lkey != UINT32_MAX); rte_rwlock_read_unlock(&priv->mr.rwlock); DEBUG("port %u MR CREATED by primary process for %p:\n" " [0x%" PRIxPTR ", 0x%" PRIxPTR "), lkey=0x%x", @@ -646,12 +645,12 @@ struct mr_update_mp_data { } alloc_resources: /* Addresses must be page-aligned. */ - assert(rte_is_aligned((void *)data.start, data.msl->page_sz)); - assert(rte_is_aligned((void *)data.end, data.msl->page_sz)); + MLX4_ASSERT(rte_is_aligned((void *)data.start, data.msl->page_sz)); + MLX4_ASSERT(rte_is_aligned((void *)data.end, data.msl->page_sz)); msl = data.msl; ms = rte_mem_virt2memseg((void *)data.start, msl); len = data.end - data.start; - assert(msl->page_sz == ms->hugepage_sz); + MLX4_ASSERT(msl->page_sz == ms->hugepage_sz); /* Number of memsegs in the range. */ ms_n = len / msl->page_sz; DEBUG("port %u extending %p to [0x%" PRIxPTR ", 0x%" PRIxPTR ")," @@ -718,7 +717,7 @@ struct mr_update_mp_data { mr_free(mr); goto alloc_resources; } - assert(data.msl == data_re.msl); + MLX4_ASSERT(data.msl == data_re.msl); rte_rwlock_write_lock(&priv->mr.rwlock); /* * Check the address is really missing. If other thread already created @@ -771,7 +770,7 @@ struct mr_update_mp_data { } len = data.end - data.start; mr->ms_bmp_n = len / msl->page_sz; - assert(ms_idx_shift + mr->ms_bmp_n <= ms_n); + MLX4_ASSERT(ms_idx_shift + mr->ms_bmp_n <= ms_n); /* * Finally create a verbs MR for the memory chunk. ibv_reg_mr() can be * called with holding the memory lock because it doesn't use @@ -786,8 +785,8 @@ struct mr_update_mp_data { rte_errno = EINVAL; goto err_mrlock; } - assert((uintptr_t)mr->ibv_mr->addr == data.start); - assert(mr->ibv_mr->length == len); + MLX4_ASSERT((uintptr_t)mr->ibv_mr->addr == data.start); + MLX4_ASSERT(mr->ibv_mr->length == len); LIST_INSERT_HEAD(&priv->mr.mr_list, mr, mr); DEBUG("port %u MR CREATED (%p) for %p:\n" " [0x%" PRIxPTR ", 0x%" PRIxPTR ")," @@ -800,7 +799,7 @@ struct mr_update_mp_data { /* Fill in output data. */ mr_lookup_dev(dev, entry, addr); /* Lookup can't fail. */ - assert(entry->lkey != UINT32_MAX); + MLX4_ASSERT(entry->lkey != UINT32_MAX); rte_rwlock_write_unlock(&priv->mr.rwlock); rte_mcfg_mem_read_unlock(); return entry->lkey; @@ -905,8 +904,9 @@ struct mr_update_mp_data { dev->data->port_id, addr, len); msl = rte_mem_virt2memseg_list(addr); /* addr and len must be page-aligned. */ - assert((uintptr_t)addr == RTE_ALIGN((uintptr_t)addr, msl->page_sz)); - assert(len == RTE_ALIGN(len, msl->page_sz)); + MLX4_ASSERT((uintptr_t)addr == + RTE_ALIGN((uintptr_t)addr, msl->page_sz)); + MLX4_ASSERT(len == RTE_ALIGN(len, msl->page_sz)); ms_n = len / msl->page_sz; rte_rwlock_write_lock(&priv->mr.rwlock); /* Clear bits of freed memsegs from MR. */ @@ -922,14 +922,14 @@ struct mr_update_mp_data { mr = mr_lookup_dev_list(dev, &entry, start); if (mr == NULL) continue; - assert(mr->msl); /* Can't be external memory. */ + MLX4_ASSERT(mr->msl); /* Can't be external memory. */ ms = rte_mem_virt2memseg((void *)start, msl); - assert(ms != NULL); - assert(msl->page_sz == ms->hugepage_sz); + MLX4_ASSERT(ms != NULL); + MLX4_ASSERT(msl->page_sz == ms->hugepage_sz); ms_idx = rte_fbarray_find_idx(&msl->memseg_arr, ms); pos = ms_idx - mr->ms_base_idx; - assert(rte_bitmap_get(mr->ms_bmp, pos)); - assert(pos < mr->ms_bmp_n); + MLX4_ASSERT(rte_bitmap_get(mr->ms_bmp, pos)); + MLX4_ASSERT(pos < mr->ms_bmp_n); DEBUG("port %u MR(%p): clear bitmap[%u] for addr %p", dev->data->port_id, (void *)mr, pos, (void *)start); rte_bitmap_clear(mr->ms_bmp, pos); @@ -986,7 +986,7 @@ struct mr_update_mp_data { struct mlx4_dev_list *dev_list = &mlx4_shared_data->mem_event_cb_list; /* Must be called from the primary process. */ - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); switch (event_type) { case RTE_MEM_EVENT_FREE: rte_rwlock_read_lock(&mlx4_shared_data->mem_event_rwlock); @@ -1222,7 +1222,7 @@ struct mr_update_mp_data { struct mlx4_mr_cache entry; uint32_t lkey; - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); /* If already registered, it should return. */ rte_rwlock_read_lock(&priv->mr.rwlock); lkey = mr_lookup_dev(dev, &entry, addr); diff --git a/drivers/net/mlx4/mlx4_rxq.c b/drivers/net/mlx4/mlx4_rxq.c index 4a6fbd9..0699bdd 100644 --- a/drivers/net/mlx4/mlx4_rxq.c +++ b/drivers/net/mlx4/mlx4_rxq.c @@ -8,7 +8,6 @@ * Rx queues configuration for mlx4 driver. */ -#include #include #include #include @@ -140,12 +139,12 @@ struct mlx4_rss * void mlx4_rss_put(struct mlx4_rss *rss) { - assert(rss->refcnt); + MLX4_ASSERT(rss->refcnt); if (--rss->refcnt) return; - assert(!rss->usecnt); - assert(!rss->qp); - assert(!rss->ind); + MLX4_ASSERT(!rss->usecnt); + MLX4_ASSERT(!rss->qp); + MLX4_ASSERT(!rss->ind); LIST_REMOVE(rss, next); rte_free(rss); } @@ -167,10 +166,10 @@ struct mlx4_rss * int mlx4_rss_attach(struct mlx4_rss *rss) { - assert(rss->refcnt); + MLX4_ASSERT(rss->refcnt); if (rss->usecnt++) { - assert(rss->qp); - assert(rss->ind); + MLX4_ASSERT(rss->qp); + MLX4_ASSERT(rss->ind); return 0; } @@ -295,9 +294,9 @@ struct mlx4_rss * struct rte_eth_dev *dev = ETH_DEV(priv); unsigned int i; - assert(rss->refcnt); - assert(rss->qp); - assert(rss->ind); + MLX4_ASSERT(rss->refcnt); + MLX4_ASSERT(rss->qp); + MLX4_ASSERT(rss->ind); if (--rss->usecnt) return; claim_zero(mlx4_glue->destroy_qp(rss->qp)); @@ -366,7 +365,7 @@ struct mlx4_rss * /* Attach the configured Rx queues. */ if (rxq) { - assert(!rxq->usecnt); + MLX4_ASSERT(!rxq->usecnt); ret = mlx4_rxq_attach(rxq); if (!ret) { wq_num = rxq->wq->wq_num; @@ -463,7 +462,7 @@ struct mlx4_rss * struct rxq *rxq = ETH_DEV(priv)->data->rx_queues[i]; if (rxq) { - assert(rxq->usecnt == 1); + MLX4_ASSERT(rxq->usecnt == 1); mlx4_rxq_detach(rxq); } } @@ -488,10 +487,10 @@ struct mlx4_rss * mlx4_rxq_attach(struct rxq *rxq) { if (rxq->usecnt++) { - assert(rxq->cq); - assert(rxq->wq); - assert(rxq->wqes); - assert(rxq->rq_db); + MLX4_ASSERT(rxq->cq); + MLX4_ASSERT(rxq->wq); + MLX4_ASSERT(rxq->wqes); + MLX4_ASSERT(rxq->rq_db); return 0; } @@ -512,7 +511,7 @@ struct mlx4_rss * unsigned int i; int ret; - assert(rte_is_power_of_2(elts_n)); + MLX4_ASSERT(rte_is_power_of_2(elts_n)); priv->verbs_alloc_ctx.type = MLX4_VERBS_ALLOC_TYPE_RX_QUEUE; priv->verbs_alloc_ctx.obj = rxq; cq = mlx4_glue->create_cq(priv->ctx, elts_n / sges_n, NULL, @@ -584,10 +583,10 @@ struct mlx4_rss * goto error; } /* Headroom is reserved by rte_pktmbuf_alloc(). */ - assert(buf->data_off == RTE_PKTMBUF_HEADROOM); + MLX4_ASSERT(buf->data_off == RTE_PKTMBUF_HEADROOM); /* Buffer is supposed to be empty. */ - assert(rte_pktmbuf_data_len(buf) == 0); - assert(rte_pktmbuf_pkt_len(buf) == 0); + MLX4_ASSERT(rte_pktmbuf_data_len(buf) == 0); + MLX4_ASSERT(rte_pktmbuf_pkt_len(buf) == 0); /* Only the first segment keeps headroom. */ if (i % sges_n) buf->data_off = 0; @@ -828,7 +827,7 @@ struct mlx4_rss * .socket = socket, }; /* Enable scattered packets support for this queue if necessary. */ - assert(mb_len >= RTE_PKTMBUF_HEADROOM); + MLX4_ASSERT(mb_len >= RTE_PKTMBUF_HEADROOM); if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= (mb_len - RTE_PKTMBUF_HEADROOM)) { ; @@ -904,7 +903,7 @@ struct mlx4_rss * ret = rte_errno; mlx4_rx_queue_release(rxq); rte_errno = ret; - assert(rte_errno > 0); + MLX4_ASSERT(rte_errno > 0); return -rte_errno; } @@ -931,10 +930,10 @@ struct mlx4_rss * ETH_DEV(priv)->data->rx_queues[i] = NULL; break; } - assert(!rxq->cq); - assert(!rxq->wq); - assert(!rxq->wqes); - assert(!rxq->rq_db); + MLX4_ASSERT(!rxq->cq); + MLX4_ASSERT(!rxq->wq); + MLX4_ASSERT(!rxq->wqes); + MLX4_ASSERT(!rxq->rq_db); if (rxq->channel) claim_zero(mlx4_glue->destroy_comp_channel(rxq->channel)); mlx4_mr_btree_free(&rxq->mr_ctrl.cache_bh); diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c index a8e880e..06211bc 100644 --- a/drivers/net/mlx4/mlx4_rxtx.c +++ b/drivers/net/mlx4/mlx4_rxtx.c @@ -8,7 +8,6 @@ * Data plane functions for mlx4 driver. */ -#include #include #include #include @@ -264,7 +263,7 @@ struct tso_info { uint32_t stamp = sq->stamp; int32_t size = (intptr_t)end - (intptr_t)start; - assert(start != end); + MLX4_ASSERT(start != end); /* Hold SQ ring wrap around. */ if (size < 0) { size = (int32_t)sq->size + size; @@ -891,12 +890,12 @@ struct tso_info { volatile struct mlx4_wqe_ctrl_seg *ctrl; struct txq_elt *elt; - assert(txq->elts_comp_cd != 0); + MLX4_ASSERT(txq->elts_comp_cd != 0); if (likely(max >= txq->elts_comp_cd_init)) mlx4_txq_complete(txq, elts_m, sq); max = elts_n - max; - assert(max >= 1); - assert(max <= elts_n); + MLX4_ASSERT(max >= 1); + MLX4_ASSERT(max <= elts_n); /* Always leave one free entry in the ring. */ --max; if (max > pkts_n) @@ -1194,8 +1193,8 @@ struct tso_info { * ownership bit. */ rte_rmb(); - assert(!(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK)); - assert((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) != + MLX4_ASSERT(!(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK)); + MLX4_ASSERT((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) != MLX4_CQE_OPCODE_ERROR); ret = rte_be_to_cpu_32(cqe->byte_cnt); ++cq->cons_index; @@ -1252,7 +1251,7 @@ struct tso_info { break; } while (pkt != seg) { - assert(pkt != (*rxq->elts)[idx]); + MLX4_ASSERT(pkt != (*rxq->elts)[idx]); rep = pkt->next; pkt->next = NULL; pkt->nb_segs = 1; @@ -1275,7 +1274,7 @@ struct tso_info { goto skip; } pkt = seg; - assert(len >= (rxq->crc_present << 2)); + MLX4_ASSERT(len >= (rxq->crc_present << 2)); /* Update packet information. */ pkt->packet_type = rxq_cq_to_pkt_type(cqe, rxq->l2tun_offload); diff --git a/drivers/net/mlx4/mlx4_txq.c b/drivers/net/mlx4/mlx4_txq.c index 01a5efd..37b8441 100644 --- a/drivers/net/mlx4/mlx4_txq.c +++ b/drivers/net/mlx4/mlx4_txq.c @@ -8,7 +8,6 @@ * Tx queues configuration for mlx4 driver. */ -#include #include #include #include @@ -51,8 +50,8 @@ struct mlx4_priv *priv = txq->priv; struct mlx4_proc_priv *ppriv = MLX4_PROC_PRIV(PORT_ID(priv)); - assert(rte_eal_process_type() == RTE_PROC_PRIMARY); - assert(ppriv); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); + MLX4_ASSERT(ppriv); ppriv->uar_table[txq->stats.idx] = txq->msq.db; } @@ -81,7 +80,7 @@ uintptr_t offset; const size_t page_size = sysconf(_SC_PAGESIZE); - assert(ppriv); + MLX4_ASSERT(ppriv); /* * As rdma-core, UARs are mapped in size of OS page * size. Ref to libmlx4 function: mlx4_init_context() @@ -137,12 +136,12 @@ unsigned int i; int ret; - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); for (i = 0; i != txqs_n; ++i) { txq = dev->data->tx_queues[i]; if (!txq) continue; - assert(txq->stats.idx == (uint16_t)i); + MLX4_ASSERT(txq->stats.idx == (uint16_t)i); ret = txq_uar_init_secondary(txq, fd); if (ret) goto error; @@ -163,7 +162,7 @@ mlx4_tx_uar_init_secondary(struct rte_eth_dev *dev __rte_unused, int fd __rte_unused) { - assert(rte_eal_process_type() == RTE_PROC_SECONDARY); + MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); ERROR("UAR remap is not supported"); rte_errno = ENOTSUP; return -rte_errno; @@ -188,7 +187,7 @@ while (elts_tail != elts_head) { struct txq_elt *elt = &(*elts)[elts_tail++ & elts_m]; - assert(elt->buf != NULL); + MLX4_ASSERT(elt->buf != NULL); rte_pktmbuf_free(elt->buf); elt->buf = NULL; elt->wqe = NULL; @@ -489,7 +488,7 @@ ret = rte_errno; mlx4_tx_queue_release(txq); rte_errno = ret; - assert(rte_errno > 0); + MLX4_ASSERT(rte_errno > 0); priv->verbs_alloc_ctx.type = MLX4_VERBS_ALLOC_TYPE_NONE; return -rte_errno; } diff --git a/drivers/net/mlx4/mlx4_utils.c b/drivers/net/mlx4/mlx4_utils.c index a727d70..614dc19 100644 --- a/drivers/net/mlx4/mlx4_utils.c +++ b/drivers/net/mlx4/mlx4_utils.c @@ -8,7 +8,6 @@ * Utility functions used by the mlx4 driver. */ -#include #include #include #include @@ -36,7 +35,7 @@ if (ret != -1 && !fcntl(fd, F_SETFL, ret | O_NONBLOCK)) return 0; - assert(errno); + MLX4_ASSERT(errno); rte_errno = errno; return -rte_errno; } diff --git a/drivers/net/mlx4/mlx4_utils.h b/drivers/net/mlx4/mlx4_utils.h index 7f9a826..9137b1b 100644 --- a/drivers/net/mlx4/mlx4_utils.h +++ b/drivers/net/mlx4/mlx4_utils.h @@ -6,7 +6,6 @@ #ifndef MLX4_UTILS_H_ #define MLX4_UTILS_H_ -#include #include #include @@ -54,12 +53,13 @@ __func__, \ RTE_FMT_TAIL(__VA_ARGS__,))) #define DEBUG(...) PMD_DRV_LOG(DEBUG, __VA_ARGS__) -#define claim_zero(...) assert((__VA_ARGS__) == 0) +#define MLX4_ASSERT(exp) RTE_VERIFY(exp) +#define claim_zero(...) MLX4_ASSERT((__VA_ARGS__) == 0) #else /* MLX4_DEBUG */ /* - * Like assert(), DEBUG() becomes a no-op and claim_zero() does not perform + * Like MLX4_ASSERT(), DEBUG() becomes a no-op and claim_zero() does not perform * any check when debugging is disabled. */ @@ -69,6 +69,7 @@ RTE_FMT_HEAD(__VA_ARGS__,) "\n", \ RTE_FMT_TAIL(__VA_ARGS__,))) #define DEBUG(...) (void)0 +#define MLX4_ASSERT(exp) RTE_ASSERT(exp) #define claim_zero(...) (__VA_ARGS__) #endif /* MLX4_DEBUG */