[66/69] net/i40e/base: support for additional flow type
diff mbox series

Message ID 20191202074935.97629-67-xiaolong.ye@intel.com
State New
Delegated to: xiaolong ye
Headers show
Series
  • update for i40e base code
Related show

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Ye Xiaolong Dec. 2, 2019, 7:49 a.m. UTC
This patch adds/supports following:
- Separate flow type for TCP and UDP for IPv4[6]
- added new offload capability such as ADQ_V2 which will be used
to support advanced ADQ features such as more filter types, 16 TCs,
usage of ADQ performance code

Signed-off-by: Parthasarathy Sarangam <parthasarathy.sarangam@intel.com>
Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Reviewed-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Aggarwal Mitu <mitu.aggarwal@intel.com>
Reviewed-by: Kirsher Jeffrey T <jeffrey.t.kirsher@intel.com>
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
---
 drivers/net/i40e/base/virtchnl.h | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Patch
diff mbox series

diff --git a/drivers/net/i40e/base/virtchnl.h b/drivers/net/i40e/base/virtchnl.h
index 51b718d42..13cd0e5ab 100644
--- a/drivers/net/i40e/base/virtchnl.h
+++ b/drivers/net/i40e/base/virtchnl.h
@@ -293,6 +293,16 @@  VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vsi_resource);
 #define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM		0X00200000
 #define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM	0X00400000
 #define VIRTCHNL_VF_OFFLOAD_ADQ			0X00800000
+#ifndef EXTERNAL_RELEASE
+/* This capability is used to engage advanced ADQ features such as:
+ * - support for different filter type (e.g. TCP, UDP) simultaneously
+ * - support for filter type where L4 src + L4 dest is allowed
+ * - support upto 16 TCs
+ * - also used to indicate the engagement of performance bits if the ADQ PERF
+ *   specific code is compiled in
+ */
+#endif /* !EXTERNAL_RELEASE */
+#define VIRTCHNL_VF_OFFLOAD_ADQ_V2		0X01000000
 #define VIRTCHNL_VF_OFFLOAD_USO			0X02000000
 #ifdef VIRTCHNL_IPSEC
 #define VIRTCHNL_VF_OFFLOAD_INLINE_IPSEC	0X80000000
@@ -611,6 +621,13 @@  struct virtchnl_rss_hena {
 
 VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_rss_hena);
 
+/* This is used by PF driver to enforce how many channels can be supported.
+ * When ADQ_V2 capability is negotiated, it will allow 16 channels otherwise
+ * PF driver will allow only max 4 channels
+ */
+#define VIRTCHNL_MAX_ADQ_CHANNELS 4
+#define VIRTCHNL_MAX_ADQ_V2_CHANNELS 16
+
 /* VIRTCHNL_OP_ENABLE_CHANNELS
  * VIRTCHNL_OP_DISABLE_CHANNELS
  * VF sends these messages to enable or disable channels based on
@@ -646,6 +663,11 @@  VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_tc_info);
 struct virtchnl_l4_spec {
 	u8	src_mac[ETH_ALEN];
 	u8	dst_mac[ETH_ALEN];
+	/* vlan_prio is part of this 16 bit field even from OS perspective
+	 * vlan_id:12 is actual vlan_id, then vlanid:bit14..12 is vlan_prio
+	 * in future, when decided to offload vlan_prio, pass that information
+	 * as part of the "vlan_id" field, Bit14..12
+	 */
 	__be16	vlan_id;
 	__be16	pad; /* reserved for future use */
 	__be32	src_ip[4];
@@ -673,6 +695,8 @@  enum virtchnl_flow_type {
 	/* flow types */
 	VIRTCHNL_TCP_V4_FLOW = 0,
 	VIRTCHNL_TCP_V6_FLOW,
+	VIRTCHNL_UDP_V4_FLOW,
+	VIRTCHNL_UDP_V6_FLOW,
 };
 
 struct virtchnl_filter {