[51/69] net/i40e/base: add MRR field defines
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Message ID 20191202074935.97629-52-xiaolong.ye@intel.com
State New
Delegated to: xiaolong ye
Headers show
Series
  • update for i40e base code
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Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Ye Xiaolong Dec. 2, 2019, 7:49 a.m. UTC
Add defines for Minimum Rollback Revision fields as defined in FVL DCR
378

Signed-off-by: Jacek Naczyk <jacek.naczyk@intel.com>
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: Azarewicz Piotr <piotr.azarewicz@intel.com>
Reviewed-by: Michael Alice <alice.michael@intel.com>
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

Patch
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diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 9b481ef5b..e75301534 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -2049,5 +2049,15 @@  struct i40e_profile_info {
 #define I40E_BCM_PHY_PCS_STATUS1_RX_LPI	BIT(8)
 #define I40E_BCM_PHY_PCS_STATUS1_TX_LPI	BIT(9)
 #endif
+#if defined(PREBOOT_SUPPORT) || defined(I40E_QV)
+#define I40E_SR_MINRREV_PCIE_ANALOG_LO		0x60
+#define I40E_SR_MINRREV_PCIE_ANALOG_HI		0x61
+#define I40E_SR_MINRREV_PHY_ANALOG_LO		0x62
+#define I40E_SR_MINRREV_PHY_ANALOG_HI		0x63
+#define I40E_SR_MINRREV_OPTION_ROM_LO		0x64
+#define I40E_SR_MINRREV_OPTION_ROM_HI		0x65
+#define I40E_SR_MINRREV_EMP_IMAGE_LO		0x66
+#define I40E_SR_MINRREV_EMP_IMAGE_HI		0x67
+#endif /* PREBOOT_SUPPORT || I40E_QV */
 
 #endif /* _I40E_TYPE_H_ */