diff mbox series

[v2,1/3] net/i40e: cache fdir enable value in rx queue

Message ID 20191009152006.5768-2-harry.van.haaren@intel.com (mailing list archive)
State Accepted, archived
Delegated to: xiaolong ye
Headers
Series net/i40e: add FDIR ID to vector rx |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-compilation success Compile Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS

Commit Message

Van Haaren, Harry Oct. 9, 2019, 3:20 p.m. UTC 
  This commit adds a fdir_enable flag in a uint8_t sized hole
the rx queue structure The flag enables the rx code path to
easily identify if fdir is active. This can be used to skip
fdir id processing when it is not required.

The flag is zero by default (as rxq is zmalloc-ed at startup),
and the flag is set to 1 on configuration of a flow director rule.

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>

---

v2:
- Disable FDIR processing on flush (Qi)
- Disable FDIR processing on last rule deletion (Qi)
- Moved enable/disable to seperate function to avoid code duplication
- Added PMD_LOG INFO level print for FDIR RX Processing enable/disable
---
 drivers/net/i40e/i40e_ethdev.h |  1 +
 drivers/net/i40e/i40e_fdir.c   | 20 ++++++++++++++++++++
 drivers/net/i40e/i40e_flow.c   |  4 ++++
 drivers/net/i40e/i40e_rxtx.h   |  1 +
 4 files changed, 26 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 38ac3ead6..743bead25 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -1153,6 +1153,7 @@  const struct rte_memzone *i40e_memzone_reserve(const char *name,
 					uint32_t len,
 					int socket_id);
 int i40e_fdir_configure(struct rte_eth_dev *dev);
+void i40e_fdir_rx_proc_enable(struct rte_eth_dev *dev, bool on);
 void i40e_fdir_teardown(struct i40e_pf *pf);
 enum i40e_filter_pctype
 	i40e_flowtype_to_pctype(const struct i40e_adapter *adapter,
diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
index b3e893a5b..dee007daa 100644
--- a/drivers/net/i40e/i40e_fdir.c
+++ b/drivers/net/i40e/i40e_fdir.c
@@ -608,6 +608,23 @@  i40e_set_flex_mask_on_pctype(struct i40e_pf *pf,
 	}
 }
 
+/*
+ * Enable/disable flow director RX processing in vector routines.
+ */
+void
+i40e_fdir_rx_proc_enable(struct rte_eth_dev *dev, bool on)
+{
+	int32_t i;
+
+	for (i = 0; i < dev->data->nb_rx_queues; i++) {
+		struct i40e_rx_queue *rxq = dev->data->rx_queues[i];
+		if (!rxq)
+			continue;
+		rxq->fdir_enabled = on;
+	}
+	PMD_DRV_LOG(DEBUG, "Flow Director processing on RX set to %d", on);
+}
+
 /*
  * Configure flow director related setting
  */
@@ -675,6 +692,9 @@  i40e_fdir_configure(struct rte_eth_dev *dev)
 		PMD_DRV_LOG(ERR, "Not support flexible payload.");
 	}
 
+	/* Enable FDIR processing in RX routines */
+	i40e_fdir_rx_proc_enable(dev, 1);
+
 	return ret;
 }
 
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index e902a35d7..9e038fa48 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -4775,6 +4775,7 @@  i40e_flow_destroy(struct rte_eth_dev *dev,
 			i40e_fdir_teardown(pf);
 			dev->data->dev_conf.fdir_conf.mode =
 				   RTE_FDIR_MODE_NONE;
+			i40e_fdir_rx_proc_enable(dev, 0);
 		}
 		break;
 	case RTE_ETH_FILTER_HASH:
@@ -4931,6 +4932,9 @@  i40e_flow_flush(struct rte_eth_dev *dev, struct rte_flow_error *error)
 		return -rte_errno;
 	}
 
+	/* Disable FDIR processing as all FDIR rules are now flushed */
+	i40e_fdir_rx_proc_enable(dev, 0);
+
 	return ret;
 }
 
diff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h
index 3fc619af9..1028e8b68 100644
--- a/drivers/net/i40e/i40e_rxtx.h
+++ b/drivers/net/i40e/i40e_rxtx.h
@@ -96,6 +96,7 @@  struct i40e_rx_queue {
 
 	uint16_t port_id; /**< device port ID */
 	uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
+	uint8_t fdir_enabled; /**< 0 if FDIR disabled, 1 when enabled */
 	uint16_t queue_id; /**< RX queue index */
 	uint16_t reg_idx; /**< RX queue register index */
 	uint8_t drop_en; /**< if not 0, set register bit */