[v3,18/22] net/hns3: add dump register ops for hns3 PMD driver
diff mbox series

Message ID 1569506528-60464-19-git-send-email-xavier.huwei@huawei.com
State Accepted, archived
Delegated to: Ferruh Yigit
Headers show
Series
  • add hns3 ethernet PMD driver
Related show

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Wei Hu (Xavier) Sept. 26, 2019, 2:02 p.m. UTC
This patch adds get_reg related function codes for hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Chunsong Feng <fengchunsong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Hao Chen <chenhao164@huawei.com>
Signed-off-by: Huisong Li <lihuisong@huawei.com>
---
 drivers/net/hns3/Makefile         |   1 +
 drivers/net/hns3/hns3_ethdev.c    |   1 +
 drivers/net/hns3/hns3_ethdev_vf.c |   1 +
 drivers/net/hns3/hns3_regs.c      | 368 ++++++++++++++++++++++++++++++++++++++
 drivers/net/hns3/hns3_regs.h      |   1 +
 drivers/net/hns3/meson.build      |   1 +
 6 files changed, 373 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_regs.c

Comments

Ferruh Yigit Sept. 27, 2019, 6:31 p.m. UTC | #1
On 9/26/2019 3:02 PM, Wei Hu (Xavier) wrote:
> This patch adds get_reg related function codes for hns3 PMD driver.
> 
> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
> Signed-off-by: Chunsong Feng <fengchunsong@huawei.com>
> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
> Signed-off-by: Hao Chen <chenhao164@huawei.com>
> Signed-off-by: Huisong Li <lihuisong@huawei.com>

<...>

> +static int
> +hns3_get_32_bit_regs(struct hns3_hw *hw, uint32_t regs_num, void *data)
> +{
> +#define HNS3_32_BIT_REG_RTN_DATANUM 8
> +#define HNS3_32_BIT_DESC_NODATA_LEN 2
> +	struct hns3_cmd_desc *desc;
> +	uint32_t *reg_val = data;
> +	uint32_t *desc_data;
> +	int cmd_num;
> +	int i, k, n;
> +	int ret;
> +
> +	if (regs_num == 0)
> +		return 0;
> +
> +	cmd_num = DIV_ROUND_UP(regs_num + HNS3_32_BIT_DESC_NODATA_LEN,
> +			       HNS3_32_BIT_REG_RTN_DATANUM);
> +	desc = rte_zmalloc("hns3-32bit-regs",
> +			   sizeof(struct hns3_cmd_desc) * cmd_num, 0);
> +	if (desc == NULL) {
> +		hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
> +			 "store 32bit regs",
> +			 sizeof(struct hns3_cmd_desc) * cmd_num);

'PRIx64' won't work with 'sizeof' because its return type changes with the arch,
need to use %zx with 'sizeof'

I am aware that driver doesn't support 32-bits, but build is only broken because
of the format errors in the log formatting, I am for fixing them. Also using
correct format type is good practice.

There are following related errors [1], I am fixing them while merging [2]
please let me know if you request any change in the updated code.





[1]
.../drivers/net/hns3/hns3_regs.c(167):
error #181: argument of type "unsigned int" is incompatible with format "%llx",
expecting argument of type "unsigned long long"
                hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
                ^

.../drivers/net/hns3/hns3_regs.c(224): error #181: argument of type "unsigned
int" is incompatible with format "%llx", expecting argument of type "unsigned
long long"
                hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
                ^

.../drivers/net/hns3/hns3_ethdev_vf.c(1625):
error #181: argument of type "unsigned int" is incompatible with format "%llx",
expecting argument of type "unsigned long long"
                PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
                ^

.../drivers/net/hns3/hns3_rxtx.c(643):
error #181: argument of type "uint64_t={__uint64_t={unsigned long long}}" is
incompatible with format "%lx", expecting argument of type "unsigned long"
        hns3_dbg(hw, "No.%d rx descriptors iova 0x%lx", idx,
        ^

.../drivers/net/hns3/hns3_rxtx.c(1085):
error #181: argument of type "uint64_t={__uint64_t={unsigned long long}}" is
incompatible with format "%lx", expecting argument of type "unsigned long"
        hns3_dbg(hw, "No.%d tx descriptors iova 0x%lx", idx,
        ^

.../drivers/net/hns3/hns3_ethdev.c(4837):
error #181: argument of type "unsigned int" is incompatible with format "%llx",
expecting argument of type "unsigned long long"
                PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
                ^

[2]

 diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
 index 574eb9204..862a717fd 100644
 --- a/drivers/net/hns3/hns3_ethdev.c
 +++ b/drivers/net/hns3/hns3_ethdev.c
 @@ -4834,7 +4834,7 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
                                                sizeof(struct rte_ether_addr) *
                                                HNS3_UC_MACADDR_NUM, 0);
         if (eth_dev->data->mac_addrs == NULL) {
 -               PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
 +               PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
                              "to store MAC addresses",
                              sizeof(struct rte_ether_addr) *
                              HNS3_UC_MACADDR_NUM);
 diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
 index 07a4b01d6..121beb58d 100644
 --- a/drivers/net/hns3/hns3_ethdev_vf.c
 +++ b/drivers/net/hns3/hns3_ethdev_vf.c
 @@ -1622,7 +1622,7 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev)
                                                sizeof(struct rte_ether_addr) *
                                                HNS3_VF_UC_MACADDR_NUM, 0);
         if (eth_dev->data->mac_addrs == NULL) {
 -               PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
 +               PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
                              "to store MAC addresses",
                              sizeof(struct rte_ether_addr) *
                              HNS3_VF_UC_MACADDR_NUM);
 diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
 index d83eef339..23405030e 100644
 --- a/drivers/net/hns3/hns3_regs.c
 +++ b/drivers/net/hns3/hns3_regs.c
 @@ -164,7 +164,7 @@ hns3_get_32_bit_regs(struct hns3_hw *hw, uint32_t regs_num,
void *data)
         desc = rte_zmalloc("hns3-32bit-regs",
                            sizeof(struct hns3_cmd_desc) * cmd_num, 0);
         if (desc == NULL) {
 -               hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
 +               hns3_err(hw, "Failed to allocate %zx bytes needed to "
                          "store 32bit regs",
                          sizeof(struct hns3_cmd_desc) * cmd_num);
                 return -ENOMEM;
 @@ -221,7 +221,7 @@ hns3_get_64_bit_regs(struct hns3_hw *hw, uint32_t regs_num,
void *data)
         desc = rte_zmalloc("hns3-64bit-regs",
                            sizeof(struct hns3_cmd_desc) * cmd_num, 0);
         if (desc == NULL) {
 -               hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
 +               hns3_err(hw, "Failed to allocate %zx bytes needed to "
                          "store 64bit regs",
                          sizeof(struct hns3_cmd_desc) * cmd_num);
                 return -ENOMEM;
 diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
 index b29d98a2f..184b8e4b6 100644
 --- a/drivers/net/hns3/hns3_rxtx.c
 +++ b/drivers/net/hns3/hns3_rxtx.c
 @@ -640,7 +640,7 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
uint16_t nb_desc,
         rxq->rx_ring = (struct hns3_desc *)rx_mz->addr;
         rxq->rx_ring_phys_addr = rx_mz->iova;

 -       hns3_dbg(hw, "No.%d rx descriptors iova 0x%lx", idx,
 +       hns3_dbg(hw, "No.%d rx descriptors iova 0x%" PRIx64, idx,
                  rxq->rx_ring_phys_addr);

         rxq->next_to_use = 0;
 @@ -1082,7 +1082,7 @@ hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t
idx, uint16_t nb_desc,
         txq->tx_ring = (struct hns3_desc *)tx_mz->addr;
         txq->tx_ring_phys_addr = tx_mz->iova;

 -       hns3_dbg(hw, "No.%d tx descriptors iova 0x%lx", idx,
 +       hns3_dbg(hw, "No.%d tx descriptors iova 0x%" PRIx64, idx,
                  txq->tx_ring_phys_addr);

         /* Clear tx bd */
Wei Hu (Xavier) Sept. 29, 2019, 12:09 p.m. UTC | #2
On 2019/9/28 2:31, Ferruh Yigit wrote:
> On 9/26/2019 3:02 PM, Wei Hu (Xavier) wrote:
>> This patch adds get_reg related function codes for hns3 PMD driver.
>>
>> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
>> Signed-off-by: Chunsong Feng <fengchunsong@huawei.com>
>> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
>> Signed-off-by: Hao Chen <chenhao164@huawei.com>
>> Signed-off-by: Huisong Li <lihuisong@huawei.com>
> <...>
>
>> +static int
>> +hns3_get_32_bit_regs(struct hns3_hw *hw, uint32_t regs_num, void *data)
>> +{
>> +#define HNS3_32_BIT_REG_RTN_DATANUM 8
>> +#define HNS3_32_BIT_DESC_NODATA_LEN 2
>> +	struct hns3_cmd_desc *desc;
>> +	uint32_t *reg_val = data;
>> +	uint32_t *desc_data;
>> +	int cmd_num;
>> +	int i, k, n;
>> +	int ret;
>> +
>> +	if (regs_num == 0)
>> +		return 0;
>> +
>> +	cmd_num = DIV_ROUND_UP(regs_num + HNS3_32_BIT_DESC_NODATA_LEN,
>> +			       HNS3_32_BIT_REG_RTN_DATANUM);
>> +	desc = rte_zmalloc("hns3-32bit-regs",
>> +			   sizeof(struct hns3_cmd_desc) * cmd_num, 0);
>> +	if (desc == NULL) {
>> +		hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
>> +			 "store 32bit regs",
>> +			 sizeof(struct hns3_cmd_desc) * cmd_num);
> 'PRIx64' won't work with 'sizeof' because its return type changes with the arch,
> need to use %zx with 'sizeof'
>
> I am aware that driver doesn't support 32-bits, but build is only broken because
> of the format errors in the log formatting, I am for fixing them. Also using
> correct format type is good practice.
>
> There are following related errors [1], I am fixing them while merging [2]
> please let me know if you request any change in the updated code.
>
>

Thanks you very much! Ferruh Yigit

Best regards,
Xavier
>
>
> [1]
> .../drivers/net/hns3/hns3_regs.c(167):
> error #181: argument of type "unsigned int" is incompatible with format "%llx",
> expecting argument of type "unsigned long long"
>                 hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
>                 ^
>
> .../drivers/net/hns3/hns3_regs.c(224): error #181: argument of type "unsigned
> int" is incompatible with format "%llx", expecting argument of type "unsigned
> long long"
>                 hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
>                 ^
>
> .../drivers/net/hns3/hns3_ethdev_vf.c(1625):
> error #181: argument of type "unsigned int" is incompatible with format "%llx",
> expecting argument of type "unsigned long long"
>                 PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
>                 ^
>
> .../drivers/net/hns3/hns3_rxtx.c(643):
> error #181: argument of type "uint64_t={__uint64_t={unsigned long long}}" is
> incompatible with format "%lx", expecting argument of type "unsigned long"
>         hns3_dbg(hw, "No.%d rx descriptors iova 0x%lx", idx,
>         ^
>
> .../drivers/net/hns3/hns3_rxtx.c(1085):
> error #181: argument of type "uint64_t={__uint64_t={unsigned long long}}" is
> incompatible with format "%lx", expecting argument of type "unsigned long"
>         hns3_dbg(hw, "No.%d tx descriptors iova 0x%lx", idx,
>         ^
>
> .../drivers/net/hns3/hns3_ethdev.c(4837):
> error #181: argument of type "unsigned int" is incompatible with format "%llx",
> expecting argument of type "unsigned long long"
>                 PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
>                 ^
>
> [2]
>
>  diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
>  index 574eb9204..862a717fd 100644
>  --- a/drivers/net/hns3/hns3_ethdev.c
>  +++ b/drivers/net/hns3/hns3_ethdev.c
>  @@ -4834,7 +4834,7 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
>                                                 sizeof(struct rte_ether_addr) *
>                                                 HNS3_UC_MACADDR_NUM, 0);
>          if (eth_dev->data->mac_addrs == NULL) {
>  -               PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
>  +               PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
>                               "to store MAC addresses",
>                               sizeof(struct rte_ether_addr) *
>                               HNS3_UC_MACADDR_NUM);
>  diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
>  index 07a4b01d6..121beb58d 100644
>  --- a/drivers/net/hns3/hns3_ethdev_vf.c
>  +++ b/drivers/net/hns3/hns3_ethdev_vf.c
>  @@ -1622,7 +1622,7 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev)
>                                                 sizeof(struct rte_ether_addr) *
>                                                 HNS3_VF_UC_MACADDR_NUM, 0);
>          if (eth_dev->data->mac_addrs == NULL) {
>  -               PMD_INIT_LOG(ERR, "Failed to allocate %" PRIx64 " bytes needed "
>  +               PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
>                               "to store MAC addresses",
>                               sizeof(struct rte_ether_addr) *
>                               HNS3_VF_UC_MACADDR_NUM);
>  diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
>  index d83eef339..23405030e 100644
>  --- a/drivers/net/hns3/hns3_regs.c
>  +++ b/drivers/net/hns3/hns3_regs.c
>  @@ -164,7 +164,7 @@ hns3_get_32_bit_regs(struct hns3_hw *hw, uint32_t regs_num,
> void *data)
>          desc = rte_zmalloc("hns3-32bit-regs",
>                             sizeof(struct hns3_cmd_desc) * cmd_num, 0);
>          if (desc == NULL) {
>  -               hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
>  +               hns3_err(hw, "Failed to allocate %zx bytes needed to "
>                           "store 32bit regs",
>                           sizeof(struct hns3_cmd_desc) * cmd_num);
>                  return -ENOMEM;
>  @@ -221,7 +221,7 @@ hns3_get_64_bit_regs(struct hns3_hw *hw, uint32_t regs_num,
> void *data)
>          desc = rte_zmalloc("hns3-64bit-regs",
>                             sizeof(struct hns3_cmd_desc) * cmd_num, 0);
>          if (desc == NULL) {
>  -               hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
>  +               hns3_err(hw, "Failed to allocate %zx bytes needed to "
>                           "store 64bit regs",
>                           sizeof(struct hns3_cmd_desc) * cmd_num);
>                  return -ENOMEM;
>  diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
>  index b29d98a2f..184b8e4b6 100644
>  --- a/drivers/net/hns3/hns3_rxtx.c
>  +++ b/drivers/net/hns3/hns3_rxtx.c
>  @@ -640,7 +640,7 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
> uint16_t nb_desc,
>          rxq->rx_ring = (struct hns3_desc *)rx_mz->addr;
>          rxq->rx_ring_phys_addr = rx_mz->iova;
>
>  -       hns3_dbg(hw, "No.%d rx descriptors iova 0x%lx", idx,
>  +       hns3_dbg(hw, "No.%d rx descriptors iova 0x%" PRIx64, idx,
>                   rxq->rx_ring_phys_addr);
>
>          rxq->next_to_use = 0;
>  @@ -1082,7 +1082,7 @@ hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t
> idx, uint16_t nb_desc,
>          txq->tx_ring = (struct hns3_desc *)tx_mz->addr;
>          txq->tx_ring_phys_addr = tx_mz->iova;
>
>  -       hns3_dbg(hw, "No.%d tx descriptors iova 0x%lx", idx,
>  +       hns3_dbg(hw, "No.%d tx descriptors iova 0x%" PRIx64, idx,
>                   txq->tx_ring_phys_addr);
>
>          /* Clear tx bd */
>
> .
>

Patch
diff mbox series

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 1a5c66a..4cc971b 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -30,6 +30,7 @@  SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_dcb.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 9a7be4e..4801e2d 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -4050,6 +4050,7 @@  static const struct eth_dev_ops hns3_eth_dev_ops = {
 	.vlan_tpid_set          = hns3_vlan_tpid_set,
 	.vlan_offload_set       = hns3_vlan_offload_set,
 	.vlan_pvid_set          = hns3_vlan_pvid_set,
+	.get_reg                = hns3_get_regs,
 	.get_dcb_info           = hns3_get_dcb_info,
 	.dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
 };
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 8a0dbb9..64b0f11 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1134,6 +1134,7 @@  static const struct eth_dev_ops hns3vf_eth_dev_ops = {
 	.filter_ctrl        = hns3_dev_filter_ctrl,
 	.vlan_filter_set    = hns3vf_vlan_filter_set,
 	.vlan_offload_set   = hns3vf_vlan_offload_set,
+	.get_reg            = hns3_get_regs,
 	.dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
 };
 
diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
new file mode 100644
index 0000000..d83eef3
--- /dev/null
+++ b/drivers/net/hns3/hns3_regs.c
@@ -0,0 +1,368 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#include <errno.h>
+#include <stdarg.h>
+#include <stdbool.h>
+#include <string.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <inttypes.h>
+#include <unistd.h>
+#include <rte_bus_pci.h>
+#include <rte_byteorder.h>
+#include <rte_common.h>
+#include <rte_dev.h>
+#include <rte_eal.h>
+#include <rte_ether.h>
+#include <rte_ethdev_driver.h>
+#include <rte_ethdev_pci.h>
+#include <rte_io.h>
+#include <rte_pci.h>
+
+#include "hns3_ethdev.h"
+#include "hns3_logs.h"
+#include "hns3_rxtx.h"
+#include "hns3_regs.h"
+
+#define MAX_SEPARATE_NUM	4
+#define SEPARATOR_VALUE		0xFFFFFFFF
+#define REG_NUM_PER_LINE	4
+#define REG_LEN_PER_LINE	(REG_NUM_PER_LINE * sizeof(uint32_t))
+
+static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_ADDR_L_REG,
+					  HNS3_CMDQ_TX_ADDR_H_REG,
+					  HNS3_CMDQ_TX_DEPTH_REG,
+					  HNS3_CMDQ_TX_TAIL_REG,
+					  HNS3_CMDQ_TX_HEAD_REG,
+					  HNS3_CMDQ_RX_ADDR_L_REG,
+					  HNS3_CMDQ_RX_ADDR_H_REG,
+					  HNS3_CMDQ_RX_DEPTH_REG,
+					  HNS3_CMDQ_RX_TAIL_REG,
+					  HNS3_CMDQ_RX_HEAD_REG,
+					  HNS3_VECTOR0_CMDQ_SRC_REG,
+					  HNS3_CMDQ_INTR_STS_REG,
+					  HNS3_CMDQ_INTR_EN_REG,
+					  HNS3_CMDQ_INTR_GEN_REG};
+
+static const uint32_t common_reg_addrs[] = {HNS3_MISC_VECTOR_REG_BASE,
+					    HNS3_VECTOR0_OTER_EN_REG,
+					    HNS3_MISC_RESET_STS_REG,
+					    HNS3_VECTOR0_OTHER_INT_STS_REG,
+					    HNS3_GLOBAL_RESET_REG,
+					    HNS3_FUN_RST_ING,
+					    HNS3_GRO_EN_REG};
+
+static const uint32_t common_vf_reg_addrs[] = {HNS3_MISC_VECTOR_REG_BASE,
+					       HNS3_FUN_RST_ING,
+					       HNS3_GRO_EN_REG};
+
+static const uint32_t ring_reg_addrs[] = {HNS3_RING_RX_BASEADDR_L_REG,
+					  HNS3_RING_RX_BASEADDR_H_REG,
+					  HNS3_RING_RX_BD_NUM_REG,
+					  HNS3_RING_RX_BD_LEN_REG,
+					  HNS3_RING_RX_MERGE_EN_REG,
+					  HNS3_RING_RX_TAIL_REG,
+					  HNS3_RING_RX_HEAD_REG,
+					  HNS3_RING_RX_FBDNUM_REG,
+					  HNS3_RING_RX_OFFSET_REG,
+					  HNS3_RING_RX_FBD_OFFSET_REG,
+					  HNS3_RING_RX_STASH_REG,
+					  HNS3_RING_RX_BD_ERR_REG,
+					  HNS3_RING_TX_BASEADDR_L_REG,
+					  HNS3_RING_TX_BASEADDR_H_REG,
+					  HNS3_RING_TX_BD_NUM_REG,
+					  HNS3_RING_TX_PRIORITY_REG,
+					  HNS3_RING_TX_TC_REG,
+					  HNS3_RING_TX_MERGE_EN_REG,
+					  HNS3_RING_TX_TAIL_REG,
+					  HNS3_RING_TX_HEAD_REG,
+					  HNS3_RING_TX_FBDNUM_REG,
+					  HNS3_RING_TX_OFFSET_REG,
+					  HNS3_RING_TX_EBD_NUM_REG,
+					  HNS3_RING_TX_EBD_OFFSET_REG,
+					  HNS3_RING_TX_BD_ERR_REG,
+					  HNS3_RING_EN_REG};
+
+static const uint32_t tqp_intr_reg_addrs[] = {HNS3_TQP_INTR_CTRL_REG,
+					      HNS3_TQP_INTR_GL0_REG,
+					      HNS3_TQP_INTR_GL1_REG,
+					      HNS3_TQP_INTR_GL2_REG,
+					      HNS3_TQP_INTR_RL_REG};
+
+static int
+hns3_get_regs_num(struct hns3_hw *hw, uint32_t *regs_num_32_bit,
+		  uint32_t *regs_num_64_bit)
+{
+	struct hns3_cmd_desc desc;
+	int ret;
+
+	hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_REG_NUM, true);
+	ret = hns3_cmd_send(hw, &desc, 1);
+	if (ret) {
+		hns3_err(hw, "Query register number cmd failed, ret = %d",
+			 ret);
+		return ret;
+	}
+
+	*regs_num_32_bit = rte_le_to_cpu_32(desc.data[0]);
+	*regs_num_64_bit = rte_le_to_cpu_32(desc.data[1]);
+
+	return 0;
+}
+
+static int
+hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
+{
+	struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+	int cmdq_lines, common_lines, ring_lines, tqp_intr_lines;
+	uint32_t regs_num_32_bit, regs_num_64_bit;
+	int ret;
+
+	ret = hns3_get_regs_num(hw, &regs_num_32_bit, &regs_num_64_bit);
+	if (ret) {
+		hns3_err(hw, "Get register number failed, ret = %d.",
+			 ret);
+		return -ENOTSUP;
+	}
+
+	cmdq_lines = sizeof(cmdq_reg_addrs) / REG_LEN_PER_LINE + 1;
+	if (hns->is_vf)
+		common_lines =
+			sizeof(common_vf_reg_addrs) / REG_LEN_PER_LINE + 1;
+	else
+		common_lines = sizeof(common_reg_addrs) / REG_LEN_PER_LINE + 1;
+	ring_lines = sizeof(ring_reg_addrs) / REG_LEN_PER_LINE + 1;
+	tqp_intr_lines = sizeof(tqp_intr_reg_addrs) / REG_LEN_PER_LINE + 1;
+
+	*length = (cmdq_lines + common_lines + ring_lines * hw->tqps_num +
+		   tqp_intr_lines * hw->num_msi) * REG_LEN_PER_LINE +
+		  regs_num_32_bit * sizeof(uint32_t) +
+		  regs_num_64_bit * sizeof(uint64_t);
+
+	return 0;
+}
+
+static int
+hns3_get_32_bit_regs(struct hns3_hw *hw, uint32_t regs_num, void *data)
+{
+#define HNS3_32_BIT_REG_RTN_DATANUM 8
+#define HNS3_32_BIT_DESC_NODATA_LEN 2
+	struct hns3_cmd_desc *desc;
+	uint32_t *reg_val = data;
+	uint32_t *desc_data;
+	int cmd_num;
+	int i, k, n;
+	int ret;
+
+	if (regs_num == 0)
+		return 0;
+
+	cmd_num = DIV_ROUND_UP(regs_num + HNS3_32_BIT_DESC_NODATA_LEN,
+			       HNS3_32_BIT_REG_RTN_DATANUM);
+	desc = rte_zmalloc("hns3-32bit-regs",
+			   sizeof(struct hns3_cmd_desc) * cmd_num, 0);
+	if (desc == NULL) {
+		hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
+			 "store 32bit regs",
+			 sizeof(struct hns3_cmd_desc) * cmd_num);
+		return -ENOMEM;
+	}
+
+	hns3_cmd_setup_basic_desc(&desc[0], HNS3_OPC_QUERY_32_BIT_REG, true);
+	ret = hns3_cmd_send(hw, desc, cmd_num);
+	if (ret) {
+		hns3_err(hw, "Query 32 bit register cmd failed, ret = %d",
+			 ret);
+		rte_free(desc);
+		return ret;
+	}
+
+	for (i = 0; i < cmd_num; i++) {
+		if (i == 0) {
+			desc_data = &desc[i].data[0];
+			n = HNS3_32_BIT_REG_RTN_DATANUM -
+			    HNS3_32_BIT_DESC_NODATA_LEN;
+		} else {
+			desc_data = (uint32_t *)(&desc[i]);
+			n = HNS3_32_BIT_REG_RTN_DATANUM;
+		}
+		for (k = 0; k < n; k++) {
+			*reg_val++ = rte_le_to_cpu_32(*desc_data++);
+
+			regs_num--;
+			if (regs_num == 0)
+				break;
+		}
+	}
+
+	rte_free(desc);
+	return 0;
+}
+
+static int
+hns3_get_64_bit_regs(struct hns3_hw *hw, uint32_t regs_num, void *data)
+{
+#define HNS3_64_BIT_REG_RTN_DATANUM 4
+#define HNS3_64_BIT_DESC_NODATA_LEN 1
+	struct hns3_cmd_desc *desc;
+	uint64_t *reg_val = data;
+	uint64_t *desc_data;
+	int cmd_num;
+	int i, k, n;
+	int ret;
+
+	if (regs_num == 0)
+		return 0;
+
+	cmd_num = DIV_ROUND_UP(regs_num + HNS3_64_BIT_DESC_NODATA_LEN,
+			       HNS3_64_BIT_REG_RTN_DATANUM);
+	desc = rte_zmalloc("hns3-64bit-regs",
+			   sizeof(struct hns3_cmd_desc) * cmd_num, 0);
+	if (desc == NULL) {
+		hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed to "
+			 "store 64bit regs",
+			 sizeof(struct hns3_cmd_desc) * cmd_num);
+		return -ENOMEM;
+	}
+
+	hns3_cmd_setup_basic_desc(&desc[0], HNS3_OPC_QUERY_64_BIT_REG, true);
+	ret = hns3_cmd_send(hw, desc, cmd_num);
+	if (ret) {
+		hns3_err(hw, "Query 64 bit register cmd failed, ret = %d",
+			 ret);
+		rte_free(desc);
+		return ret;
+	}
+
+	for (i = 0; i < cmd_num; i++) {
+		if (i == 0) {
+			desc_data = (uint64_t *)(&desc[i].data[0]);
+			n = HNS3_64_BIT_REG_RTN_DATANUM -
+			    HNS3_64_BIT_DESC_NODATA_LEN;
+		} else {
+			desc_data = (uint64_t *)(&desc[i]);
+			n = HNS3_64_BIT_REG_RTN_DATANUM;
+		}
+		for (k = 0; k < n; k++) {
+			*reg_val++ = rte_le_to_cpu_64(*desc_data++);
+
+			regs_num--;
+			if (!regs_num)
+				break;
+		}
+	}
+
+	rte_free(desc);
+	return 0;
+}
+
+static void
+hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
+{
+	struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+	uint32_t reg_offset;
+	int separator_num;
+	int reg_um;
+	int i, j;
+
+	/* fetching per-PF registers values from PF PCIe register space */
+	reg_um = sizeof(cmdq_reg_addrs) / sizeof(uint32_t);
+	separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE;
+	for (i = 0; i < reg_um; i++)
+		*data++ = hns3_read_dev(hw, cmdq_reg_addrs[i]);
+	for (i = 0; i < separator_num; i++)
+		*data++ = SEPARATOR_VALUE;
+
+	if (hns->is_vf)
+		reg_um = sizeof(common_vf_reg_addrs) / sizeof(uint32_t);
+	else
+		reg_um = sizeof(common_reg_addrs) / sizeof(uint32_t);
+	separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE;
+	for (i = 0; i < reg_um; i++)
+		if (hns->is_vf)
+			*data++ = hns3_read_dev(hw, common_vf_reg_addrs[i]);
+		else
+			*data++ = hns3_read_dev(hw, common_reg_addrs[i]);
+	for (i = 0; i < separator_num; i++)
+		*data++ = SEPARATOR_VALUE;
+
+	reg_um = sizeof(ring_reg_addrs) / sizeof(uint32_t);
+	separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE;
+	for (j = 0; j < hw->tqps_num; j++) {
+		reg_offset = HNS3_TQP_REG_OFFSET + HNS3_TQP_REG_SIZE * j;
+		for (i = 0; i < reg_um; i++)
+			*data++ = hns3_read_dev(hw,
+						ring_reg_addrs[i] + reg_offset);
+		for (i = 0; i < separator_num; i++)
+			*data++ = SEPARATOR_VALUE;
+	}
+
+	reg_um = sizeof(tqp_intr_reg_addrs) / sizeof(uint32_t);
+	separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE;
+	for (j = 0; j < hw->num_msi; j++) {
+		reg_offset = HNS3_TQP_INTR_REG_SIZE * j;
+		for (i = 0; i < reg_um; i++)
+			*data++ = hns3_read_dev(hw,
+						tqp_intr_reg_addrs[i] +
+						reg_offset);
+		for (i = 0; i < separator_num; i++)
+			*data++ = SEPARATOR_VALUE;
+	}
+}
+
+int
+hns3_get_regs(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs)
+{
+	struct hns3_adapter *hns = eth_dev->data->dev_private;
+	struct hns3_hw *hw = &hns->hw;
+	uint32_t regs_num_32_bit;
+	uint32_t regs_num_64_bit;
+	uint32_t length;
+	uint32_t *data;
+	int ret;
+
+	if (regs == NULL) {
+		hns3_err(hw, "the input parameter regs is NULL!");
+		return -EINVAL;
+	}
+
+	ret = hns3_get_regs_length(hw, &length);
+	if (ret)
+		return ret;
+
+	data = regs->data;
+	if (data == NULL) {
+		regs->length = length;
+		regs->width = sizeof(uint32_t);
+		return 0;
+	}
+
+	/* Only full register dump is supported */
+	if (regs->length && regs->length != length)
+		return -ENOTSUP;
+
+	/* fetching per-PF registers values from PF PCIe register space */
+	hns3_direct_access_regs(hw, data);
+
+	ret = hns3_get_regs_num(hw, &regs_num_32_bit, &regs_num_64_bit);
+	if (ret) {
+		hns3_err(hw, "Get register number failed, ret = %d", ret);
+		return ret;
+	}
+
+	/* fetching PF common registers values from firmware */
+	ret = hns3_get_32_bit_regs(hw, regs_num_32_bit, data);
+	if (ret) {
+		hns3_err(hw, "Get 32 bit register failed, ret = %d", ret);
+		return ret;
+	}
+
+	data += regs_num_32_bit;
+	ret = hns3_get_64_bit_regs(hw, regs_num_64_bit, data);
+	if (ret)
+		hns3_err(hw, "Get 64 bit register failed, ret = %d", ret);
+
+	return ret;
+}
diff --git a/drivers/net/hns3/hns3_regs.h b/drivers/net/hns3/hns3_regs.h
index 5a4f315..2f5faaf 100644
--- a/drivers/net/hns3/hns3_regs.h
+++ b/drivers/net/hns3/hns3_regs.h
@@ -95,4 +95,5 @@ 
 
 #define HNS3_TQP_INTR_REG_SIZE			4
 
+int hns3_get_regs(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs);
 #endif /* _HNS3_REGS_H_ */
diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
index 1d8b1b1..77d9154 100644
--- a/drivers/net/hns3/meson.build
+++ b/drivers/net/hns3/meson.build
@@ -20,6 +20,7 @@  sources = files('hns3_cmd.c',
 	'hns3_fdir.c',
 	'hns3_flow.c',
 	'hns3_mbx.c',
+	'hns3_regs.c',
 	'hns3_rss.c',
 	'hns3_rxtx.c',
 	)