diff mbox series

[2/2] net/octeontx2: add ptype translation for ICMP6

Message ID 20190904080433.177220-2-ndabilpuram@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [1/2] net/octeontx2: fix ptype translation logic |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Nithin Dabilpuram Sept. 4, 2019, 8:04 a.m. UTC 
  Update ptype translation logic with ICMP6
in both outer and inner layers.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/net/octeontx2/otx2_lookup.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/octeontx2/otx2_lookup.c b/drivers/net/octeontx2/otx2_lookup.c
index 13c26a9..fd0bc10 100644
--- a/drivers/net/octeontx2/otx2_lookup.c
+++ b/drivers/net/octeontx2/otx2_lookup.c
@@ -138,6 +138,7 @@  nix_create_non_tunnel_ptype_array(uint16_t *ptype)
 			val |= RTE_PTYPE_L4_SCTP;
 			break;
 		case NPC_LT_LD_ICMP:
+		case NPC_LT_LD_ICMP6:
 			val |= RTE_PTYPE_L4_ICMP;
 			break;
 		case NPC_LT_LD_IGMP:
@@ -222,6 +223,7 @@  nix_create_tunnel_ptype_array(uint16_t *ptype)
 			val |= TU_SHIFT(RTE_PTYPE_INNER_L4_SCTP);
 			break;
 		case NPC_LT_LH_TU_ICMP:
+		case NPC_LT_LH_TU_ICMP6:
 			val |= TU_SHIFT(RTE_PTYPE_INNER_L4_ICMP);
 			break;
 		}