[02/11] crypto/octeontx2: add device init sequence in probe

Message ID 1567146501-8224-3-git-send-email-anoobj@marvell.com
State New
Delegated to: akhil goyal
Headers show
Series
  • add OCTEON TX2 crypto PMD
Related show

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph Aug. 30, 2019, 6:28 a.m.
This patch adds the device init sequence for OCTEON TX2 crypto
device.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 drivers/crypto/octeontx2/Makefile              | 10 +++++++
 drivers/crypto/octeontx2/meson.build           |  2 ++
 drivers/crypto/octeontx2/otx2_cryptodev.c      | 40 ++++++++++++++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev.h      | 10 ++++++-
 drivers/crypto/octeontx2/otx2_cryptodev_mbox.c | 30 +++++++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_mbox.h | 13 +++++++++
 6 files changed, 104 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_mbox.c
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_mbox.h

Patch

diff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile
index 3273178..10d8c39 100644
--- a/drivers/crypto/octeontx2/Makefile
+++ b/drivers/crypto/octeontx2/Makefile
@@ -23,9 +23,19 @@  VPATH += $(RTE_SDK)/drivers/crypto/octeontx2
 CFLAGS += -O3
 CFLAGS += -I$(RTE_SDK)/drivers/common/cpt
 CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2
+
+ifneq ($(CONFIG_RTE_ARCH_64),y)
+CFLAGS += -Wno-int-to-pointer-cast
+CFLAGS += -Wno-pointer-to-int-cast
+ifeq ($(CONFIG_RTE_TOOLCHAIN_ICC),y)
+CFLAGS += -diag-disable 2259
+endif
+endif
 
 # PMD code
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_mbox.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_ops.c
 
 # export include files
diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
index 2b55d2a..845d50d 100644
--- a/drivers/crypto/octeontx2/meson.build
+++ b/drivers/crypto/octeontx2/meson.build
@@ -11,6 +11,7 @@  deps += ['common_octeontx2']
 name = 'octeontx2_crypto'
 
 sources = files('otx2_cryptodev.c',
+		'otx2_cryptodev_mbox.c',
 		'otx2_cryptodev_ops.c')
 
 extra_flags = []
@@ -27,3 +28,4 @@  endforeach
 
 includes += include_directories('../../common/cpt')
 includes += include_directories('../../common/octeontx2')
+includes += include_directories('../../mempool/octeontx2')
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index cf3a010..814b9ed 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -18,7 +18,9 @@ 
 
 #include "otx2_common.h"
 #include "otx2_cryptodev.h"
+#include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_dev.h"
 
 static int otx2_cryptodev_logtype;
 
@@ -44,6 +46,9 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 	};
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
 	struct rte_cryptodev *dev;
+	struct otx2_dev *otx2_dev;
+	struct otx2_cpt_vf *vf;
+	uint16_t nb_queues;
 	int ret;
 
 	/* Initialize logtype used in common */
@@ -61,6 +66,37 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
 	dev->driver_id = otx2_cryptodev_driver_id;
 
+	/* Get private data space allocated */
+	vf = dev->data->dev_private;
+
+	otx2_dev = &vf->otx2_dev;
+
+	/* Initialize the base otx2_dev object */
+	ret = otx2_dev_init(pci_dev, otx2_dev);
+	if (ret) {
+		CPT_LOG_ERR("Could not initialize otx2_dev");
+		goto pmd_destroy;
+	}
+
+	/* Get number of queues available on the device */
+	ret = otx2_cpt_available_queues_get(dev, &nb_queues);
+	if (ret) {
+		CPT_LOG_ERR("Could not determine the number of queues available");
+		goto otx2_dev_fini;
+	}
+
+	/* Don't exceed the limits set per VF */
+	nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
+
+	if (nb_queues == 0) {
+		CPT_LOG_ERR("No free queues available on the device");
+		goto otx2_dev_fini;
+	}
+
+	vf->max_queues = nb_queues;
+
+	CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
+
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			     RTE_CRYPTODEV_FF_HW_ACCELERATED |
 			     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
@@ -70,6 +106,10 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
 	return 0;
 
+otx2_dev_fini:
+	otx2_dev_fini(pci_dev, otx2_dev);
+pmd_destroy:
+	rte_cryptodev_pmd_destroy(dev);
 exit:
 	CPT_LOG_ERR("Could not create device (vendor_id: 0x%x device_id: 0x%x)",
 		    pci_dev->id.vendor_id, pci_dev->id.device_id);
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h
index da0f653..531bd6d 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.h
@@ -7,14 +7,22 @@ 
 
 #include "cpt_common.h"
 
+#include "otx2_dev.h"
+
 /* Marvell OCTEON TX2 Crypto PMD device name */
 #define CRYPTODEV_NAME_OCTEONTX2_PMD	crypto_octeontx2
 
+#define OTX2_CPT_MAX_LFS		64
+#define OTX2_CPT_MAX_QUEUES_PER_VF	64
+
 /**
  * Device private data
  */
 struct otx2_cpt_vf {
-	/* To be populated */
+	struct otx2_dev otx2_dev;
+	/**< Base class */
+	uint16_t max_queues;
+	/**< Max queues supported */
 };
 
 /*
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c
new file mode 100644
index 0000000..48d86ef
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c
@@ -0,0 +1,30 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2019 Marvell International Ltd.
+ */
+#include <rte_cryptodev.h>
+
+#include "cpt_pmd_logs.h"
+
+#include "otx2_cryptodev.h"
+#include "otx2_cryptodev_mbox.h"
+#include "otx2_dev.h"
+#include "otx2_mbox.h"
+
+int
+otx2_cpt_available_queues_get(const struct rte_cryptodev *dev,
+			      uint16_t *nb_queues)
+{
+	struct otx2_cpt_vf *vf = dev->data->dev_private;
+	struct otx2_dev *otx2_dev = &vf->otx2_dev;
+	struct free_rsrcs_rsp *rsp;
+	int ret;
+
+	otx2_mbox_alloc_msg_free_rsrc_cnt(otx2_dev->mbox);
+
+	ret = otx2_mbox_process_msg(otx2_dev->mbox, (void *)&rsp);
+	if (ret)
+		return -EIO;
+
+	*nb_queues = rsp->cpt;
+	return 0;
+}
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
new file mode 100644
index 0000000..648c009
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
@@ -0,0 +1,13 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_MBOX_H_
+#define _OTX2_CRYPTODEV_MBOX_H_
+
+#include <rte_cryptodev.h>
+
+int otx2_cpt_available_queues_get(const struct rte_cryptodev *dev,
+				  uint16_t *nb_queues);
+
+#endif /* _OTX2_CRYPTODEV_MBOX_H_ */