From patchwork Thu Jul 18 13:46:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 56717 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AA7241DBE; Thu, 18 Jul 2019 15:46:31 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 6EF9A1C01 for ; Thu, 18 Jul 2019 15:46:30 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x6IDjoJf027460 for ; Thu, 18 Jul 2019 06:46:29 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=GVMD4tBQ4nfjfs8wUVGLLrMMIXT5wIO8q4gC5wxF974=; b=PGDMdfqc3KMRIqSfMfF9c2X62TUy0ij2uBNLt4NQcqUVHbtMqhfEzvRyQC/Pcpkxdang +hyR/UUavneUufTbuHDsJm09Kdky1ZnlV9ks61VYBgrMD5LmwzwkSo9NFcjTXdhb1/rX Rx1431sliV3G5R3ppB7BNn0QmDC4LZie4VFNFeHrY4ZrI8yoAoc8lh+SJN4bC62iDvuJ fa5QKi3aTn5hoDuPM1pHba2Ho21KLrRwZt3uR3bVqq5pE6xUjzNvgTGjiT2DlpdRdru9 BaapzYzS9prFMTRaNCTte/1IG5BDcQVthwydlBdatOPvRfAiQBcvIpvK035C1+PcQgM5 0g== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 2ts07vmwsw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 18 Jul 2019 06:46:29 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 18 Jul 2019 06:46:28 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Thu, 18 Jul 2019 06:46:28 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 6C1AD3F703F; Thu, 18 Jul 2019 06:46:26 -0700 (PDT) From: Nithin Dabilpuram To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: Date: Thu, 18 Jul 2019 19:16:22 +0530 Message-ID: <20190718134622.150667-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20190718130931.99036-1-ndabilpuram@marvell.com> References: <20190718130931.99036-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-18_06:2019-07-18,2019-07-18 signatures=0 Subject: [dpdk-dev] [PATCH v2] net/octeontx2: add build check on fast path fields X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add build bug on on fast path used fields that are dependent on their positions and values. Fixes: f1eff76ab63e ("net/octeontx2: add Rx vector version") Fixes: ddc1bc26e9ed ("net/octeontx2: add Tx vector version") Signed-off-by: Nithin Dabilpuram Acked-by: Jerin Jacob --- drivers/net/octeontx2/otx2_ethdev.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index fcb1869..77bf9aa 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -586,6 +586,24 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev) RTE_BUILD_BUG_ON(PKT_TX_TCP_CKSUM != (1ULL << 52)); RTE_BUILD_BUG_ON(PKT_TX_SCTP_CKSUM != (2ULL << 52)); RTE_BUILD_BUG_ON(PKT_TX_UDP_CKSUM != (3ULL << 52)); + RTE_BUILD_BUG_ON(PKT_TX_IP_CKSUM != (1ULL << 54)); + RTE_BUILD_BUG_ON(PKT_TX_IPV4 != (1ULL << 55)); + RTE_BUILD_BUG_ON(PKT_TX_OUTER_IP_CKSUM != (1ULL << 58)); + RTE_BUILD_BUG_ON(PKT_TX_OUTER_IPV4 != (1ULL << 59)); + RTE_BUILD_BUG_ON(PKT_TX_OUTER_IPV6 != (1ULL << 60)); + RTE_BUILD_BUG_ON(PKT_TX_OUTER_UDP_CKSUM != (1ULL << 41)); + RTE_BUILD_BUG_ON(RTE_MBUF_L2_LEN_BITS != 7); + RTE_BUILD_BUG_ON(RTE_MBUF_L3_LEN_BITS != 9); + RTE_BUILD_BUG_ON(RTE_MBUF_OUTL2_LEN_BITS != 7); + RTE_BUILD_BUG_ON(RTE_MBUF_OUTL3_LEN_BITS != 9); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_off) != + offsetof(struct rte_mbuf, buf_iova) + 8); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) != + offsetof(struct rte_mbuf, buf_iova) + 16); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != + offsetof(struct rte_mbuf, ol_flags) + 12); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, tx_offload) != + offsetof(struct rte_mbuf, pool) + 2 * sizeof(void *)); if (conf & DEV_TX_OFFLOAD_VLAN_INSERT || conf & DEV_TX_OFFLOAD_QINQ_INSERT)