From patchwork Sun Jun 30 18:05:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 55703 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5820B1BAD7; Sun, 30 Jun 2019 20:08:41 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 689011B9A7 for ; Sun, 30 Jun 2019 20:07:58 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5UI640v016301; Sun, 30 Jun 2019 11:07:57 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=fmJJoBfcaUmSsa70AktvzENzL17le7jdOwlOL8PneDo=; b=RJXzA1YfDHqxBvywLPrIcxrRorGRtRRKbxt6AvTRLmiz1zgMzJOzHjPiQGrs4Qf1eZW9 wxZMQUvHLewfjCDjRsITDA8/p/flkwst1L03xtVLY9FTrdPkoRNIKEZekJ05hTMU1NcJ 56EtyTWARc9IrUAICig3VINiNdCtI8SOfjhbWNTJrqxq0CO+QDL+YOLnmQ6oaxjtDwbu vp10SsHoMCU4eePI8l2DWf/YCWC3V/ASTkJc/BAvGeAYQpF2sRVTGTpCCZjeROek6KxE DvX5uXpeRQqkwkzhJy7GWZRTIiJ/tJfrGSn0x3zppuKDJop7rrYSS807k3VEaTe3dgre Xw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2te7gm3ybg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 30 Jun 2019 11:07:57 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sun, 30 Jun 2019 11:07:55 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Sun, 30 Jun 2019 11:07:55 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id E32B23F703F; Sun, 30 Jun 2019 11:07:53 -0700 (PDT) From: To: , John McNamara , Marko Kovacevic , Jerin Jacob , "Nithin Dabilpuram" , Kiran Kumar K Date: Sun, 30 Jun 2019 23:35:39 +0530 Message-ID: <20190630180609.36705-28-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190630180609.36705-1-jerinj@marvell.com> References: <20190602152434.23996-1-jerinj@marvell.com> <20190630180609.36705-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-30_08:, , signatures=0 Subject: [dpdk-dev] [PATCH v2 27/57] net/octeontx2: add Rx and Tx descriptor operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob Add Rx and Tx queue descriptor related operations. Signed-off-by: Jerin Jacob Signed-off-by: Kiran Kumar K --- doc/guides/nics/features/octeontx2.ini | 2 + doc/guides/nics/features/octeontx2_vec.ini | 2 + doc/guides/nics/features/octeontx2_vf.ini | 2 + drivers/net/octeontx2/otx2_ethdev.c | 4 ++ drivers/net/octeontx2/otx2_ethdev.h | 4 ++ drivers/net/octeontx2/otx2_ethdev_ops.c | 83 ++++++++++++++++++++++ 6 files changed, 97 insertions(+) diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini index 0de07776f..f07b64f24 100644 --- a/doc/guides/nics/features/octeontx2.ini +++ b/doc/guides/nics/features/octeontx2.ini @@ -12,6 +12,7 @@ Link status = Y Link status event = Y Runtime Rx queue setup = Y Runtime Tx queue setup = Y +Free Tx mbuf on demand = Y Queue start/stop = Y Promiscuous mode = Y Allmulticast mode = Y @@ -21,6 +22,7 @@ RSS key update = Y RSS reta update = Y Inner RSS = Y Packet type parsing = Y +Rx descriptor status = Y Basic stats = Y Stats per queue = Y Extended stats = Y diff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini index b4b253aa4..911c926e4 100644 --- a/doc/guides/nics/features/octeontx2_vec.ini +++ b/doc/guides/nics/features/octeontx2_vec.ini @@ -12,6 +12,7 @@ Link status = Y Link status event = Y Runtime Rx queue setup = Y Runtime Tx queue setup = Y +Free Tx mbuf on demand = Y Queue start/stop = Y Promiscuous mode = Y Allmulticast mode = Y @@ -21,6 +22,7 @@ RSS key update = Y RSS reta update = Y Inner RSS = Y Packet type parsing = Y +Rx descriptor status = Y Basic stats = Y Extended stats = Y Stats per queue = Y diff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini index 21cc4861e..e275e6469 100644 --- a/doc/guides/nics/features/octeontx2_vf.ini +++ b/doc/guides/nics/features/octeontx2_vf.ini @@ -11,12 +11,14 @@ Link status = Y Link status event = Y Runtime Rx queue setup = Y Runtime Tx queue setup = Y +Free Tx mbuf on demand = Y Queue start/stop = Y RSS hash = Y RSS key update = Y RSS reta update = Y Inner RSS = Y Packet type parsing = Y +Rx descriptor status = Y Basic stats = Y Extended stats = Y Stats per queue = Y diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index a504870f6..feeba5c96 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -1295,6 +1295,10 @@ static const struct eth_dev_ops otx2_eth_dev_ops = { .xstats_get_names_by_id = otx2_nix_xstats_get_names_by_id, .rxq_info_get = otx2_nix_rxq_info_get, .txq_info_get = otx2_nix_txq_info_get, + .rx_queue_count = otx2_nix_rx_queue_count, + .rx_descriptor_done = otx2_nix_rx_descriptor_done, + .rx_descriptor_status = otx2_nix_rx_descriptor_status, + .tx_done_cleanup = otx2_nix_tx_done_cleanup, .pool_ops_supported = otx2_nix_pool_ops_supported, }; diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index 199d5f242..8f2691c80 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -279,6 +279,10 @@ void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id, struct rte_eth_rxq_info *qinfo); void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); +uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx); +int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt); +int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset); +int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset); void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en); void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev); diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c index eda5f8a01..44cc17200 100644 --- a/drivers/net/octeontx2/otx2_ethdev_ops.c +++ b/drivers/net/octeontx2/otx2_ethdev_ops.c @@ -126,6 +126,89 @@ otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id, qinfo->conf.tx_deferred_start = 0; } +static void +nix_rx_head_tail_get(struct otx2_eth_dev *dev, + uint32_t *head, uint32_t *tail, uint16_t queue_idx) +{ + uint64_t reg, val; + + if (head == NULL || tail == NULL) + return; + + reg = (((uint64_t)queue_idx) << 32); + val = otx2_atomic64_add_nosync(reg, (int64_t *) + (dev->base + NIX_LF_CQ_OP_STATUS)); + if (val & (OP_ERR | CQ_ERR)) + val = 0; + + *tail = (uint32_t)(val & 0xFFFFF); + *head = (uint32_t)((val >> 20) & 0xFFFFF); +} + +uint32_t +otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t queue_idx) +{ + struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[queue_idx]; + struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + uint32_t head, tail; + + nix_rx_head_tail_get(dev, &head, &tail, queue_idx); + return (tail - head) % rxq->qlen; +} + +static inline int +nix_offset_has_packet(uint32_t head, uint32_t tail, uint16_t offset) +{ + /* Check given offset(queue index) has packet filled by HW */ + if (tail > head && offset <= tail && offset >= head) + return 1; + /* Wrap around case */ + if (head > tail && (offset >= head || offset <= tail)) + return 1; + + return 0; +} + +int +otx2_nix_rx_descriptor_done(void *rx_queue, uint16_t offset) +{ + struct otx2_eth_rxq *rxq = rx_queue; + uint32_t head, tail; + + nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev), + &head, &tail, rxq->rq); + + return nix_offset_has_packet(head, tail, offset); +} + +int +otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset) +{ + struct otx2_eth_rxq *rxq = rx_queue; + uint32_t head, tail; + + if (rxq->qlen >= offset) + return -EINVAL; + + nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev), + &head, &tail, rxq->rq); + + if (nix_offset_has_packet(head, tail, offset)) + return RTE_ETH_RX_DESC_DONE; + else + return RTE_ETH_RX_DESC_AVAIL; +} + +/* It is a NOP for octeontx2 as HW frees the buffer on xmit */ +int +otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt) +{ + RTE_SET_USED(txq); + RTE_SET_USED(free_cnt); + + return 0; +} + int otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool) {