From patchwork Fri Jun 28 18:23:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 55646 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 408DF1BBDE; Fri, 28 Jun 2019 20:25:54 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 5D49C1BB3B for ; Fri, 28 Jun 2019 20:25:39 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5SIPEFp014540; Fri, 28 Jun 2019 11:25:38 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=IIHD9eMYCE21VdzOWuuphp1+o2jigUHrOCeT7c9PvMQ=; b=WoG4nDa6hd3Tghb8oF8+R3ZMuYIAjLQd/cLRuURR0bbJ/A42gXVm1I+ywLhYmg5Rfsq7 q1G0dXPdrnwY6s3k2qakmgqbpwuFUId9icvofkQ1r2yxhP4NqCEOWjO1W9g2eUl7INLs W7IuX4UktcJh3uFw2+qy6vFN3tpOdLeep1YxEhIR/4+Ne7e9o3krRFazgbgcyo0rCMe2 FYidrNSlcCv0QvjfMDNM/AQ3E5E/sNid2GxoQJAVfeS5y1yyP4sQyKjnIxuj5d8tOC7u USprEdWmzVO8nfSg5gtNV2RbeeWR58aYa5nQRZpU6BmzdI474PGXDijFD71pQ4sDYAsz OA== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 2tdkg191nh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 28 Jun 2019 11:25:38 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 28 Jun 2019 11:25:36 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Fri, 28 Jun 2019 11:25:36 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.12]) by maili.marvell.com (Postfix) with ESMTP id 10EF03F7041; Fri, 28 Jun 2019 11:25:33 -0700 (PDT) From: To: , Pavan Nikhilesh , "John McNamara" , Marko Kovacevic CC: Date: Fri, 28 Jun 2019 23:53:52 +0530 Message-ID: <20190628182354.228-42-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190628182354.228-1-pbhagavatula@marvell.com> References: <20190628182354.228-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-28_08:, , signatures=0 Subject: [dpdk-dev] [PATCH v3 41/42] event/octeontx2: add devargs to limit timer adapters X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add devargs to limit the max number of TIM rings reserved on probe. Since, TIM rings are HW resources we can avoid starving other applications by not grabbing all the rings. Example: --dev "0002:0e:00.0,tim_rings_lmt=2" Signed-off-by: Pavan Nikhilesh --- doc/guides/eventdevs/octeontx2.rst | 10 ++++++++++ drivers/event/octeontx2/otx2_tim_evdev.c | 6 +++++- drivers/event/octeontx2/otx2_tim_evdev.h | 1 + 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst index bbc66558f..baa866a1e 100644 --- a/doc/guides/eventdevs/octeontx2.rst +++ b/doc/guides/eventdevs/octeontx2.rst @@ -122,6 +122,16 @@ Runtime Config Options --dev "0002:0e:00.0,tim_stats_ena=1" +- ``TIM limit max rings reserved`` + + The ``tim_rings_lmt`` devargs can be used to limit the max number of TIM + rings i.e. event timer adapter reserved on probe. Since, TIM rings are HW + resources we can avoid starving other applications by not grabbing all the + rings. + For example:: + + --dev "0002:0e:00.0,tim_rings_lmt=5" + Debugging Options ~~~~~~~~~~~~~~~~~ diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c index cd9a679fb..c312bd541 100644 --- a/drivers/event/octeontx2/otx2_tim_evdev.c +++ b/drivers/event/octeontx2/otx2_tim_evdev.c @@ -527,6 +527,7 @@ otx2_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, #define OTX2_TIM_DISABLE_NPA "tim_disable_npa" #define OTX2_TIM_CHNK_SLOTS "tim_chnk_slots" #define OTX2_TIM_STATS_ENA "tim_stats_ena" +#define OTX2_TIM_RINGS_LMT "tim_rings_lmt" static void tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev) @@ -546,6 +547,8 @@ tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev) &parse_kvargs_value, &dev->chunk_slots); rte_kvargs_process(kvlist, OTX2_TIM_STATS_ENA, &parse_kvargs_flag, &dev->enable_stats); + rte_kvargs_process(kvlist, OTX2_TIM_RINGS_LMT, &parse_kvargs_value, + &dev->min_ring_cnt); } void @@ -583,7 +586,8 @@ otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev) goto mz_free; } - dev->nb_rings = rsrc_cnt->tim; + dev->nb_rings = dev->min_ring_cnt ? + RTE_MIN(dev->min_ring_cnt, rsrc_cnt->tim) : rsrc_cnt->tim; if (!dev->nb_rings) { otx2_tim_dbg("No TIM Logical functions provisioned."); diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h index c8d16b03f..5af724ef9 100644 --- a/drivers/event/octeontx2/otx2_tim_evdev.h +++ b/drivers/event/octeontx2/otx2_tim_evdev.h @@ -121,6 +121,7 @@ struct otx2_tim_evdev { /* Dev args */ uint8_t disable_npa; uint16_t chunk_slots; + uint16_t min_ring_cnt; uint8_t enable_stats; /* MSIX offsets */ uint16_t tim_msixoff[OTX2_MAX_TIM_RINGS];