From patchwork Fri Jun 28 18:23:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 55620 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9C7291B9EB; Fri, 28 Jun 2019 20:24:58 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 7D3831B9AA for ; Fri, 28 Jun 2019 20:24:35 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5SIKCvb010205 for ; Fri, 28 Jun 2019 11:24:35 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=pAIiYTF3ogb6rrJBNNLflMPLkPydsQ6117vJzllago4=; b=spr+qUfrogTssJsekUQeD9jV0nHd44pAhSmjKwyxaX9N+aTzo5nRFLv//DoJdR43spyR grECbzXY+Zs3aAhLGCTkp8kbABKvdyLxwhEU+S8ZvZc/lrUcUKKpPYch1uUACb+/Ka2N oI23EpDF6y+FQhZWLuxGVfBw52/hJu4rr7QKE3n9Ah639zkRsSWt0v5PJEw8s+J96ROa KEdXiutLfAIq1K+QJSNerk9xE3EDa/uIs19dqvXtFOj2oHO0jcp+UZIrTDEAkNeynrNe k2A4tc5B8wVZIxt6T0hvb7eNT+Qhc2fVhNWKc0a6i6hjJUbaGqNmmk90A6EJJ5GmNwTB mg== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2tdkg191h5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 28 Jun 2019 11:24:35 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 28 Jun 2019 11:24:32 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Fri, 28 Jun 2019 11:24:32 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.12]) by maili.marvell.com (Postfix) with ESMTP id AA00D3F7040; Fri, 28 Jun 2019 11:24:31 -0700 (PDT) From: To: , Pavan Nikhilesh CC: Date: Fri, 28 Jun 2019 23:53:26 +0530 Message-ID: <20190628182354.228-16-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190628182354.228-1-pbhagavatula@marvell.com> References: <20190628182354.228-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-28_08:, , signatures=0 Subject: [dpdk-dev] [PATCH v3 15/42] event/octeontx2: add worker enqueue functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add worker event enqueue functions. Signed-off-by: Pavan Nikhilesh --- drivers/event/octeontx2/otx2_evdev.h | 8 ++ drivers/event/octeontx2/otx2_worker.c | 136 ++++++++++++++++++++++++++ 2 files changed, 144 insertions(+) diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h index cccce1dea..4f2fd33df 100644 --- a/drivers/event/octeontx2/otx2_evdev.h +++ b/drivers/event/octeontx2/otx2_evdev.h @@ -170,6 +170,14 @@ parse_kvargs_value(const char *key, const char *value, void *opaque) return 0; } +uint16_t otx2_ssogws_enq(void *port, const struct rte_event *ev); +uint16_t otx2_ssogws_enq_burst(void *port, const struct rte_event ev[], + uint16_t nb_events); +uint16_t otx2_ssogws_enq_new_burst(void *port, const struct rte_event ev[], + uint16_t nb_events); +uint16_t otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[], + uint16_t nb_events); + /* Init and Fini API's */ int otx2_sso_init(struct rte_eventdev *event_dev); int otx2_sso_fini(struct rte_eventdev *event_dev); diff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c index 83f535d05..044c5f132 100644 --- a/drivers/event/octeontx2/otx2_worker.c +++ b/drivers/event/octeontx2/otx2_worker.c @@ -3,3 +3,139 @@ */ #include "otx2_worker.h" + +static __rte_noinline uint8_t +otx2_ssogws_new_event(struct otx2_ssogws *ws, const struct rte_event *ev) +{ + const uint32_t tag = (uint32_t)ev->event; + const uint8_t new_tt = ev->sched_type; + const uint64_t event_ptr = ev->u64; + const uint16_t grp = ev->queue_id; + + if (ws->xaq_lmt <= *ws->fc_mem) + return 0; + + otx2_ssogws_add_work(ws, event_ptr, tag, new_tt, grp); + + return 1; +} + +static __rte_always_inline void +otx2_ssogws_fwd_swtag(struct otx2_ssogws *ws, const struct rte_event *ev) +{ + const uint32_t tag = (uint32_t)ev->event; + const uint8_t new_tt = ev->sched_type; + const uint8_t cur_tt = ws->cur_tt; + + /* 96XX model + * cur_tt/new_tt SSO_SYNC_ORDERED SSO_SYNC_ATOMIC SSO_SYNC_UNTAGGED + * + * SSO_SYNC_ORDERED norm norm untag + * SSO_SYNC_ATOMIC norm norm untag + * SSO_SYNC_UNTAGGED norm norm NOOP + */ + + if (new_tt == SSO_SYNC_UNTAGGED) { + if (cur_tt != SSO_SYNC_UNTAGGED) + otx2_ssogws_swtag_untag(ws); + } else { + otx2_ssogws_swtag_norm(ws, tag, new_tt); + } + + ws->swtag_req = 1; +} + +static __rte_always_inline void +otx2_ssogws_fwd_group(struct otx2_ssogws *ws, const struct rte_event *ev, + const uint16_t grp) +{ + const uint32_t tag = (uint32_t)ev->event; + const uint8_t new_tt = ev->sched_type; + + otx2_write64(ev->u64, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) + + SSOW_LF_GWS_OP_UPD_WQP_GRP1); + rte_smp_wmb(); + otx2_ssogws_swtag_desched(ws, tag, new_tt, grp); +} + +static __rte_always_inline void +otx2_ssogws_forward_event(struct otx2_ssogws *ws, const struct rte_event *ev) +{ + const uint8_t grp = ev->queue_id; + + /* Group hasn't changed, Use SWTAG to forward the event */ + if (ws->cur_grp == grp) + otx2_ssogws_fwd_swtag(ws, ev); + else + /* + * Group has been changed for group based work pipelining, + * Use deschedule/add_work operation to transfer the event to + * new group/core + */ + otx2_ssogws_fwd_group(ws, ev, grp); +} + +static __rte_always_inline void +otx2_ssogws_release_event(struct otx2_ssogws *ws) +{ + otx2_ssogws_swtag_flush(ws); +} + +uint16_t __hot +otx2_ssogws_enq(void *port, const struct rte_event *ev) +{ + struct otx2_ssogws *ws = port; + + switch (ev->op) { + case RTE_EVENT_OP_NEW: + rte_smp_mb(); + return otx2_ssogws_new_event(ws, ev); + case RTE_EVENT_OP_FORWARD: + otx2_ssogws_forward_event(ws, ev); + break; + case RTE_EVENT_OP_RELEASE: + otx2_ssogws_release_event(ws); + break; + default: + return 0; + } + + return 1; +} + +uint16_t __hot +otx2_ssogws_enq_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + RTE_SET_USED(nb_events); + return otx2_ssogws_enq(port, ev); +} + +uint16_t __hot +otx2_ssogws_enq_new_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct otx2_ssogws *ws = port; + uint16_t i, rc = 1; + + rte_smp_mb(); + if (ws->xaq_lmt <= *ws->fc_mem) + return 0; + + for (i = 0; i < nb_events && rc; i++) + rc = otx2_ssogws_new_event(ws, &ev[i]); + + return nb_events; +} + +uint16_t __hot +otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct otx2_ssogws *ws = port; + + RTE_SET_USED(nb_events); + otx2_ssogws_forward_event(ws, ev); + + return 1; +}