[30/49] net/ice/base: add rd64 support

Message ID 20190604054248.68510-31-leyi.rong@intel.com
State Superseded
Delegated to: Qi Zhang
Headers show
Series
  • shared code update
Related show

Checks

Context Check Description
ci/Intel-compilation fail Compilation issues
ci/checkpatch success coding style OK

Commit Message

Leyi Rong June 4, 2019, 5:42 a.m.
Add API support for rd64.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
---
 drivers/net/ice/base/ice_osdep.h | 9 +++++++++
 1 file changed, 9 insertions(+)

Patch

diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index ede893fc9..35a17b941 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -126,11 +126,19 @@  do {									\
 #define ICE_PCI_REG(reg)     rte_read32(reg)
 #define ICE_PCI_REG_ADDR(a, reg) \
 	((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
+#define ICE_PCI_REG64(reg)     rte_read64(reg)
+#define ICE_PCI_REG_ADDR64(a, reg) \
+	((volatile uint64_t *)((char *)(a)->hw_addr + (reg)))
 static inline uint32_t ice_read_addr(volatile void *addr)
 {
 	return rte_le_to_cpu_32(ICE_PCI_REG(addr));
 }
 
+static inline uint64_t ice_read_addr64(volatile void *addr)
+{
+	return rte_le_to_cpu_64(ICE_PCI_REG64(addr));
+}
+
 #define ICE_PCI_REG_WRITE(reg, value) \
 	rte_write32((rte_cpu_to_le_32(value)), reg)
 
@@ -145,6 +153,7 @@  static inline uint32_t ice_read_addr(volatile void *addr)
 	ICE_PCI_REG_WRITE(ICE_PCI_REG_ADDR((a), (reg)), (value))
 #define flush(a) ice_read_addr(ICE_PCI_REG_ADDR((a), (GLGEN_STAT)))
 #define div64_long(n, d) ((n) / (d))
+#define rd64(a, reg) ice_read_addr64(ICE_PCI_REG_ADDR64((a), (reg)))
 
 #define BITS_PER_BYTE       8