diff mbox series

[1/5] event/octeontx2: resize SSO inflight event buffers

Message ID 20190603093156.381-2-pbhagavatula@marvell.com (mailing list archive)
State Superseded, archived
Headers
Series event/octeontx2: add Rx/Tx adapter support |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Pavan Nikhilesh Bhagavatula June 3, 2019, 9:31 a.m. UTC 
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Resize SSO internal in-flight buffer count based on the Rx queues
mempool size connected to event queues.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/event/octeontx2/otx2_evdev.h       |  2 ++
 drivers/event/octeontx2/otx2_evdev_adptr.c | 34 +++++++++++++++++++++-
 2 files changed, 35 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index d1e99b9d9..223b811d4 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -117,7 +117,9 @@  struct otx2_sso_evdev {
 	uint64_t nb_xaq_cfg;
 	rte_iova_t fc_iova;
 	struct rte_mempool *xaq_pool;
+	uint16_t rx_adptr_pool_cnt;
 	uint32_t adptr_xae_cnt;
+	uint64_t *rx_adptr_pools;
 	/* Dev args */
 	uint8_t dual_ws;
 	uint8_t selftest;
diff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c
index 1aef864fe..762b0a04a 100644
--- a/drivers/event/octeontx2/otx2_evdev_adptr.c
+++ b/drivers/event/octeontx2/otx2_evdev_adptr.c
@@ -199,6 +199,29 @@  void
 sso_updt_xae_cnt(struct otx2_sso_evdev *dev, void *data, uint32_t event_type)
 {
 	switch (event_type) {
+	case RTE_EVENT_TYPE_ETHDEV:
+	{
+		struct otx2_eth_rxq *rxq = data;
+		int i, match = false;
+
+		for (i = 0; i < dev->rx_adptr_pool_cnt; i++) {
+			if ((uint64_t)rxq->pool == dev->rx_adptr_pools[i])
+				match = true;
+		}
+
+		if (!match) {
+			dev->rx_adptr_pool_cnt++;
+			dev->rx_adptr_pools = rte_realloc(dev->rx_adptr_pools,
+							  sizeof(uint64_t) *
+							  dev->rx_adptr_pool_cnt
+							  , 0);
+			dev->rx_adptr_pools[dev->rx_adptr_pool_cnt - 1] =
+				(uint64_t)rxq->pool;
+
+			dev->adptr_xae_cnt += rxq->pool->size;
+		}
+		break;
+	}
 	case RTE_EVENT_TYPE_TIMER:
 	{
 		dev->adptr_xae_cnt += (*(uint64_t *)data);
@@ -216,21 +239,30 @@  otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev,
 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 {
 	struct otx2_eth_dev *otx2_eth_dev = eth_dev->data->dev_private;
+	struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
 	uint16_t port = eth_dev->data->port_id;
+	struct otx2_eth_rxq *rxq;
 	int i, rc;
 
-	RTE_SET_USED(event_dev);
 	rc = strncmp(eth_dev->device->driver->name, "net_octeontx2", 13);
 	if (rc)
 		return -EINVAL;
 
 	if (rx_queue_id < 0) {
 		for (i = 0 ; i < eth_dev->data->nb_rx_queues; i++) {
+			rxq = eth_dev->data->rx_queues[i];
+			sso_updt_xae_cnt(dev, rxq, RTE_EVENT_TYPE_ETHDEV);
+			rc = sso_xae_reconfigure((struct rte_eventdev *)
+						 (uintptr_t)event_dev);
 			rc |= sso_rxq_enable(otx2_eth_dev, i,
 					     queue_conf->ev.sched_type,
 					     queue_conf->ev.queue_id, port);
 		}
 	} else {
+		rxq = eth_dev->data->rx_queues[rx_queue_id];
+		sso_updt_xae_cnt(dev, rxq, RTE_EVENT_TYPE_ETHDEV);
+		rc = sso_xae_reconfigure((struct rte_eventdev *)
+					 (uintptr_t)event_dev);
 		rc |= sso_rxq_enable(otx2_eth_dev, (uint16_t)rx_queue_id,
 				     queue_conf->ev.sched_type,
 				     queue_conf->ev.queue_id, port);