From patchwork Sun Jun 2 15:24:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 54093 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DAD4E1BB71; Sun, 2 Jun 2019 17:27:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id EC6F21BA57 for ; Sun, 2 Jun 2019 17:27:11 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x52FK4k8020253; Sun, 2 Jun 2019 08:27:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=VPjzGxk4M36Hm3e8jClYVS2NOkzh3uRj/nei6l88W4g=; b=Qd0pQPNvvEvZrHw1rg+uZKwRpSZ4+M0+Dkp6sLbPFT80Emb8kJRg7RCcyi6j+JXavNyO pblPATUgHBCkdRMcqeXFHyLdIM5tfFekOnPVy/fc88z/xIHApFeH0lN0me5PVHaFMtVS h8nnZtn2sBBpNBWoqTHFeCAOJ7t51hywd1OGQ1wG5fDJkupWM77wBxiQKw4q//11lkc6 3r/U1KLpurNyrFyMbNf+dCTbC0Wmqx5Y9Ej0KASQKzhCcgplo8LLlPMNFW15ZgdwiDt2 f7Ev0ie59zumRAUojIUjCu4Gu9rPcqK2ispcjykNL0GNgVOxhKaauWr5xzQIpzVzjibd XQ== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2survk499v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 02 Jun 2019 08:27:11 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sun, 2 Jun 2019 08:27:09 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Sun, 2 Jun 2019 08:27:09 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id 8CAF23F7040; Sun, 2 Jun 2019 08:27:07 -0700 (PDT) From: To: , John McNamara , Marko Kovacevic , Jerin Jacob , "Nithin Dabilpuram" , Kiran Kumar K , Anatoly Burakov CC: , Pavan Nikhilesh Date: Sun, 2 Jun 2019 20:54:26 +0530 Message-ID: <20190602152434.23996-51-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190602152434.23996-1-jerinj@marvell.com> References: <20190602152434.23996-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-02_09:, , signatures=0 Subject: [dpdk-dev] [PATCH v1 50/58] net/octeontx2: add Rx multi segment version X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Nithin Dabilpuram Add multi segment version of packet Receive function. Signed-off-by: Nithin Dabilpuram Signed-off-by: Pavan Nikhilesh --- doc/guides/nics/features/octeontx2.ini | 2 + doc/guides/nics/features/octeontx2_vec.ini | 1 + doc/guides/nics/features/octeontx2_vf.ini | 2 + drivers/net/octeontx2/otx2_rx.c | 25 ++++++++++ drivers/net/octeontx2/otx2_rx.h | 55 +++++++++++++++++++++- 5 files changed, 84 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini index 6117e1edf..18bcf81cf 100644 --- a/doc/guides/nics/features/octeontx2.ini +++ b/doc/guides/nics/features/octeontx2.ini @@ -24,6 +24,8 @@ Inner RSS = Y VLAN filter = Y Flow control = Y Flow API = Y +Jumbo frame = Y +Scattered Rx = Y VLAN offload = Y QinQ offload = Y Packet type parsing = Y diff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini index 66c327cfc..97a24671e 100644 --- a/doc/guides/nics/features/octeontx2_vec.ini +++ b/doc/guides/nics/features/octeontx2_vec.ini @@ -24,6 +24,7 @@ Inner RSS = Y VLAN filter = Y Flow control = Y Flow API = Y +Jumbo frame = Y VLAN offload = Y QinQ offload = Y Packet type parsing = Y diff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini index 3aa0491e1..916a6d7b0 100644 --- a/doc/guides/nics/features/octeontx2_vf.ini +++ b/doc/guides/nics/features/octeontx2_vf.ini @@ -19,6 +19,8 @@ RSS reta update = Y Inner RSS = Y VLAN filter = Y Flow API = Y +Jumbo frame = Y +Scattered Rx = Y VLAN offload = Y QinQ offload = Y Packet type parsing = Y diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c index b4a3e9d55..0f0919338 100644 --- a/drivers/net/octeontx2/otx2_rx.c +++ b/drivers/net/octeontx2/otx2_rx.c @@ -91,6 +91,14 @@ otx2_nix_recv_pkts_ ## name(void *rx_queue, \ { \ return nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \ } \ + \ +static uint16_t __rte_noinline __hot \ +otx2_nix_recv_pkts_mseg_ ## name(void *rx_queue, \ + struct rte_mbuf **rx_pkts, uint16_t pkts) \ +{ \ + return nix_recv_pkts(rx_queue, rx_pkts, pkts, \ + (flags) | NIX_RX_MULTI_SEG_F); \ +} \ NIX_RX_FASTPATH_MODES #undef R @@ -114,15 +122,32 @@ pick_rx_func(struct rte_eth_dev *eth_dev, void otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev) { + struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_ ## name, +NIX_RX_FASTPATH_MODES +#undef R + }; + + const eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2] = { +#define R(name, f5, f4, f3, f2, f1, f0, flags) \ + [f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_mseg_ ## name, + NIX_RX_FASTPATH_MODES #undef R }; pick_rx_func(eth_dev, nix_eth_rx_burst); + if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER) + pick_rx_func(eth_dev, nix_eth_rx_burst_mseg); + + /* Copy multi seg version with no offload for tear down sequence */ + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + dev->rx_pkt_burst_no_offload = + nix_eth_rx_burst_mseg[0][0][0][0][0][0]; rte_mb(); } diff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h index fc0e87d14..1d1150786 100644 --- a/drivers/net/octeontx2/otx2_rx.h +++ b/drivers/net/octeontx2/otx2_rx.h @@ -23,6 +23,11 @@ #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(4) #define NIX_RX_OFFLOAD_TSTAMP_F BIT(5) +/* Flags to control cqe_to_mbuf conversion function. + * Defining it from backwards to denote its been + * not used as offload flags to pick function + */ +#define NIX_RX_MULTI_SEG_F BIT(15) #define NIX_TIMESYNC_RX_OFFSET 8 struct otx2_timesync_info { @@ -133,6 +138,51 @@ nix_update_match_id(const uint16_t match_id, uint64_t ol_flags, return ol_flags; } +static __rte_always_inline void +nix_cqe_xtract_mseg(const struct nix_rx_parse_s *rx, + struct rte_mbuf *mbuf, uint64_t rearm) +{ + const rte_iova_t *iova_list; + struct rte_mbuf *head; + const rte_iova_t *eol; + uint8_t nb_segs; + uint64_t sg; + + sg = *(const uint64_t *)(rx + 1); + nb_segs = (sg >> 48) & 0x3; + mbuf->nb_segs = nb_segs; + mbuf->data_len = sg & 0xFFFF; + sg = sg >> 16; + + eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1)); + /* Skip SG_S and first IOVA*/ + iova_list = ((const rte_iova_t *)(rx + 1)) + 2; + nb_segs--; + + rearm = rearm & ~0xFFFF; + + head = mbuf; + while (nb_segs) { + mbuf->next = ((struct rte_mbuf *)*iova_list) - 1; + mbuf = mbuf->next; + + __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1); + + mbuf->data_len = sg & 0xFFFF; + sg = sg >> 16; + *(uint64_t *)(&mbuf->rearm_data) = rearm; + nb_segs--; + iova_list++; + + if (!nb_segs && (iova_list + 1 < eol)) { + sg = *(const uint64_t *)(iova_list); + nb_segs = (sg >> 48) & 0x3; + head->nb_segs += nb_segs; + iova_list = (const rte_iova_t *)(iova_list + 1); + } + } +} + static __rte_always_inline void otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *mbuf, const void *lookup_mem, const uint64_t val, @@ -178,7 +228,10 @@ otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *mbuf, *(uint64_t *)(&mbuf->rearm_data) = val; mbuf->pkt_len = len; - mbuf->data_len = len; + if (flag & NIX_RX_MULTI_SEG_F) + nix_cqe_xtract_mseg(rx, mbuf, val); + else + mbuf->data_len = len; } #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F