From patchwork Sun Jun 2 15:23:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 54076 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1302B1B9E6; Sun, 2 Jun 2019 17:25:40 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 986CC1B95B for ; Sun, 2 Jun 2019 17:25:39 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x52FK4jt020253; Sun, 2 Jun 2019 08:25:39 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=QPncdV8ruv6j086dRAmI93+FfoZctL6AiKknNyOUTGs=; b=P2OZaWQSTBC5mdfXE3eHnLgYbdmtn82R3B7zQKMmUtwdhrSA8wZBXd7hRnxSwqBokum4 +6wRcGpDhIZLkGdWYW34x6VQQUic7Uayv4PxeyWl9cRS1DAbzpQDD3hiLw6Y0Vh3DQ1y ITuALl2MP4qShSBYBc6arqICEgCTwog6GWDmcaxmhwb2AZCMM8TO8qoZQ5RlOuT+68Y7 wYVa8G4QXazqoy29rkeguEbiTsiPEE8NGzAy1yMC2u4QMJoFif8/yDt/nR5QjzRO1jiR 0K+ieaDieHWcNuUIwyV39GSvc23e6hojvhvmvxIXksQFohpOrjeK9d9yNg7y1McCeM6p gA== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2survk494c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 02 Jun 2019 08:25:38 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sun, 2 Jun 2019 08:25:37 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Sun, 2 Jun 2019 08:25:37 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id A65D03F703F; Sun, 2 Jun 2019 08:25:35 -0700 (PDT) From: To: , John McNamara , Marko Kovacevic , Jerin Jacob , "Nithin Dabilpuram" , Kiran Kumar K CC: , Vamsi Attunuru Date: Sun, 2 Jun 2019 20:53:56 +0530 Message-ID: <20190602152434.23996-21-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190602152434.23996-1-jerinj@marvell.com> References: <20190602152434.23996-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-02_09:, , signatures=0 Subject: [dpdk-dev] [PATCH v1 20/58] net/octeontx2: add queue start and stop operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Nithin Dabilpuram Add queue start and stop operations. Tx queue needs to update the flow control value, Which will be added in sub subsequent patch. Signed-off-by: Nithin Dabilpuram Signed-off-by: Vamsi Attunuru --- doc/guides/nics/features/octeontx2.ini | 1 + doc/guides/nics/features/octeontx2_vec.ini | 1 + doc/guides/nics/features/octeontx2_vf.ini | 1 + drivers/net/octeontx2/otx2_ethdev.c | 92 ++++++++++++++++++++++ drivers/net/octeontx2/otx2_ethdev.h | 2 + 5 files changed, 97 insertions(+) diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini index 48ac58b3a..31816a183 100644 --- a/doc/guides/nics/features/octeontx2.ini +++ b/doc/guides/nics/features/octeontx2.ini @@ -12,6 +12,7 @@ SR-IOV = Y Multiprocess aware = Y Link status = Y Link status event = Y +Queue start/stop = Y Promiscuous mode = Y Allmulticast mode = Y Unicast MAC filter = Y diff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini index 6fc647af4..d79428652 100644 --- a/doc/guides/nics/features/octeontx2_vec.ini +++ b/doc/guides/nics/features/octeontx2_vec.ini @@ -12,6 +12,7 @@ SR-IOV = Y Multiprocess aware = Y Link status = Y Link status event = Y +Queue start/stop = Y Promiscuous mode = Y Allmulticast mode = Y Unicast MAC filter = Y diff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini index af3c70269..d4deb52af 100644 --- a/doc/guides/nics/features/octeontx2_vf.ini +++ b/doc/guides/nics/features/octeontx2_vf.ini @@ -11,6 +11,7 @@ Lock-free Tx queue = Y Multiprocess aware = Y Link status = Y Link status event = Y +Queue start/stop = Y RSS hash = Y RSS key update = Y RSS reta update = Y diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index 6e14e12f0..04a953441 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -252,6 +252,26 @@ nix_cq_rq_init(struct rte_eth_dev *eth_dev, struct otx2_eth_dev *dev, return rc; } +static int +nix_rq_enb_dis(struct rte_eth_dev *eth_dev, + struct otx2_eth_rxq *rxq, const bool enb) +{ + struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + struct otx2_mbox *mbox = dev->mbox; + struct nix_aq_enq_req *aq; + + /* Pkts will be dropped silently if RQ is disabled */ + aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox); + aq->qidx = rxq->rq; + aq->ctype = NIX_AQ_CTYPE_RQ; + aq->op = NIX_AQ_INSTOP_WRITE; + + aq->rq.ena = enb; + aq->rq_mask.ena = ~(aq->rq_mask.ena); + + return otx2_mbox_process(mbox); +} + static int nix_cq_rq_uninit(struct rte_eth_dev *eth_dev, struct otx2_eth_rxq *rxq) { @@ -1090,6 +1110,74 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) return rc; } +int +otx2_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qidx) +{ + struct rte_eth_dev_data *data = eth_dev->data; + + if (data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) + return 0; + + data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; + return 0; +} + +int +otx2_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx) +{ + struct rte_eth_dev_data *data = eth_dev->data; + + if (data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) + return 0; + + data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; + return 0; +} + +static int +otx2_nix_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qidx) +{ + struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[qidx]; + struct rte_eth_dev_data *data = eth_dev->data; + int rc; + + if (data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) + return 0; + + rc = nix_rq_enb_dis(rxq->eth_dev, rxq, true); + if (rc) { + otx2_err("Failed to enable rxq=%u, rc=%d", qidx, rc); + goto done; + } + + data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; + +done: + return rc; +} + +static int +otx2_nix_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx) +{ + struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[qidx]; + struct rte_eth_dev_data *data = eth_dev->data; + int rc; + + if (data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) + return 0; + + rc = nix_rq_enb_dis(rxq->eth_dev, rxq, false); + if (rc) { + otx2_err("Failed to disable rxq=%u, rc=%d", qidx, rc); + goto done; + } + + data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; + +done: + return rc; +} + /* Initialize and register driver with DPDK Application */ static const struct eth_dev_ops otx2_eth_dev_ops = { .dev_infos_get = otx2_nix_info_get, @@ -1099,6 +1187,10 @@ static const struct eth_dev_ops otx2_eth_dev_ops = { .tx_queue_release = otx2_nix_tx_queue_release, .rx_queue_setup = otx2_nix_rx_queue_setup, .rx_queue_release = otx2_nix_rx_queue_release, + .tx_queue_start = otx2_nix_tx_queue_start, + .tx_queue_stop = otx2_nix_tx_queue_stop, + .rx_queue_start = otx2_nix_rx_queue_start, + .rx_queue_stop = otx2_nix_rx_queue_stop, .stats_get = otx2_nix_dev_stats_get, .stats_reset = otx2_nix_dev_stats_reset, .get_reg = otx2_nix_dev_get_reg, diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index c0568dcd1..7b8c7e1e5 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -246,6 +246,8 @@ void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev); void otx2_nix_promisc_disable(struct rte_eth_dev *eth_dev); void otx2_nix_allmulticast_enable(struct rte_eth_dev *eth_dev); void otx2_nix_allmulticast_disable(struct rte_eth_dev *eth_dev); +int otx2_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qidx); +int otx2_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx); uint64_t otx2_nix_rxq_mbuf_setup(struct otx2_eth_dev *dev, uint16_t port_id); /* Link */